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Old September 14th 05, 09:29 PM
Mauro
 
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Default DDS and phase noise.

I'm not an expert and need some help.
I've build a DDS around an AD9951.
I drive it at 400MHz from a source at 200MHz multiplied by 2. I get an
output freq of 20MHz.
I now drive it directly from the same source at 200MHz. I changed the
register inside DDS to still get 20MHz on output.
I do not have any possibility to measure the phase noise.
So the question: is it possible to estimate if the phase noise of the 20MHz
output is getting better, worst or is it going to remain the same?
Thanks for the support.
73
Mauro


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Old September 15th 05, 12:27 AM
xpyttl
 
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"Mauro" wrote in message
news
So the question: is it possible to estimate if the phase noise of the
20MHz
output is getting better, worst or is it going to remain the same?


Decreasing the frequency at which you clock the DDS will increase the phase
noise. It is pretty hard to estimate as it will change quite a bit with
small changes in divisor (i.e. output frequency). But as a general rule,
you want to clock the DDS at some high multiple of the operating frequency.

Obviously, if your clock has phase noise too, that is a bad thing. I would
doubt that your frequency doubler would add phase noise, but I can't say for
sure since I haven't got your circuit. But typically doublers introduce
other forms of distortion which aren't as problematic for a DDS clock.

So just shooting from the hip, I would expect your phase noise to be a lot
worse from a 200 MHz clock than from the 400. It is still 10x the operating
frequency, though, so I wouldn't expect it to be horrible.

...


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Old September 15th 05, 01:10 AM
Dr. Grok
 
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Default

In article , "Mauro" wrote:
I'm not an expert and need some help.
I've build a DDS around an AD9951.
I drive it at 400MHz from a source at 200MHz multiplied by 2. I get an
output freq of 20MHz.
I now drive it directly from the same source at 200MHz. I changed the
register inside DDS to still get 20MHz on output.
I do not have any possibility to measure the phase noise.
So the question: is it possible to estimate if the phase noise of the 20MHz
output is getting better, worst or is it going to remain the same?
Thanks for the support.
73
Mauro


There are 2 main sources of phase noise in the output of the DDS: The
residual noise of the DDS and the divided down noise of your clock source.

The residual noise is inherent to the DDS and not dependent on the clock. It
is a function of the technology used to build it. This should be specified by
the vendor. It is usually measured by driving 2 identical DDS's from a common
source, measuring the resulting phase noise and subtracting 3 dB to account
for 2 devices.

As for your clock noise: Your 200 MHz clock noise will be increased by 6 dB
by doubling [plus any residual noise of the doubler -- use a Schottkey diode
doubler for best results]. That 6 dB will be subtracted by the extra factor
of 2 in the effective divide factor of the DDS. In short -- its a wash except
for the doubler residual noise reduced by 26 dB [20*log10(20/400)] which
should be insignificant.

Dr. G.



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Old September 15th 05, 02:45 AM
Steven Swift
 
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"Mauro" writes:

I'm not an expert and need some help.
I've build a DDS around an AD9951.
I drive it at 400MHz from a source at 200MHz multiplied by 2. I get an
output freq of 20MHz.
I now drive it directly from the same source at 200MHz. I changed the
register inside DDS to still get 20MHz on output.
I do not have any possibility to measure the phase noise.
So the question: is it possible to estimate if the phase noise of the 20MHz
output is getting better, worst or is it going to remain the same?
Thanks for the support.
73
Mauro


Assuming your source is not so good as to be below the noise floor of the
AD9951, you will get slightly better performance without multiplying by
two. The rule-of-thumb for perfect conversion is 6dB for each doubling.
But it won't be perfect, so by doubling you'll be a little worse than 6dB
and then dividing again you will not get as much back. If the doubling was
perfect and the performance of the AD9951 was the same at 200MHz and 400MHz,
you get the identical results.

Of course, this might be bogus if there are other artifacts.

Make sense?

If you can build a doubler, then you can measure phase noise. Mix your 20MHz
output with a known good 20MHz source in a double-balance mixer. Adjust the
phase to get zero DC (quadrature). If you low-pass filter the output, the
noise is an indication of phase noise. If you have a low frequency spectrum
analyser available, you can get a nice plot. Otherwise you can use an AC
voltmeter to get relative performance.


Steve.
--
Steven D. Swift, , http://www.novatech-instr.com
NOVATECH INSTRUMENTS, INC. P.O. Box 55997
206.301.8986, fax 206.363.4367 Seattle, Washington 98155 USA
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Old September 15th 05, 06:27 PM
maxfoo
 
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Default

On Wed, 14 Sep 2005 20:29:09 GMT, "Mauro" wrote:

I'm not an expert and need some help.
I've build a DDS around an AD9951.
I drive it at 400MHz from a source at 200MHz multiplied by 2. I get an
output freq of 20MHz.
I now drive it directly from the same source at 200MHz. I changed the
register inside DDS to still get 20MHz on output.
I do not have any possibility to measure the phase noise.
So the question: is it possible to estimate if the phase noise of the 20MHz
output is getting better, worst or is it going to remain the same?
Thanks for the support.
73
Mauro


I won't be to concerned with phase noise, with that dds I'd be more worried
about spurs. Those AD dds chips are notorious for them.


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Old September 15th 05, 08:12 PM
W3JDR
 
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From what I've seen in the data sheets, the closer you operate the RF output
to the Nyquist limit (Fref/2), the cleaner the spurs get. I've seen numbers
of -90 dB or better on even some of the cheapo Analog Devices parts.

Joe
W3JDR


"maxfoo" wrote in message
...
On Wed, 14 Sep 2005 20:29:09 GMT, "Mauro" wrote:

I'm not an expert and need some help.
I've build a DDS around an AD9951.
I drive it at 400MHz from a source at 200MHz multiplied by 2. I get an
output freq of 20MHz.
I now drive it directly from the same source at 200MHz. I changed the
register inside DDS to still get 20MHz on output.
I do not have any possibility to measure the phase noise.
So the question: is it possible to estimate if the phase noise of the
20MHz
output is getting better, worst or is it going to remain the same?
Thanks for the support.
73
Mauro


I won't be to concerned with phase noise, with that dds I'd be more
worried
about spurs. Those AD dds chips are notorious for them.



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Old September 15th 05, 09:09 PM
Mauro
 
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Default

Thanks to all who replied.
I think that the net is that the phase noise should remain about the same.
The source is a low noise quartz oscillator based on J.Stephensen design,
followed by a Schottkey doubler and a MAR5 amplifier.
I was in doubt to use or not the Schottkey doubler. I think i'll keep the
simplest solution: no doubler.
DDS max output will be 39MHz. A reference clock of 200MHz is still about 5
times the max output freq, high enought above the Nyquist limit.
Thanks again.
73
Mauro
i2SUH

"Mauro" wrote in message
news
I'm not an expert and need some help.
I've build a DDS around an AD9951.
I drive it at 400MHz from a source at 200MHz multiplied by 2. I get an
output freq of 20MHz.
I now drive it directly from the same source at 200MHz. I changed the
register inside DDS to still get 20MHz on output.
I do not have any possibility to measure the phase noise.
So the question: is it possible to estimate if the phase noise of the

20MHz
output is getting better, worst or is it going to remain the same?
Thanks for the support.
73
Mauro




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Old September 16th 05, 05:13 AM
Jim
 
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On Wed, 14 Sep 2005 20:29:09 GMT, "Mauro" wrote:

I'm not an expert and need some help.
I've build a DDS around an AD9951.
I drive it at 400MHz from a source at 200MHz multiplied by 2. I get an
output freq of 20MHz.
I now drive it directly from the same source at 200MHz. I changed the
register inside DDS to still get 20MHz on output.
I do not have any possibility to measure the phase noise.
So the question: is it possible to estimate if the phase noise of the 20MHz
output is getting better, worst or is it going to remain the same?
Thanks for the support.
73
Mauro



The AD9951 has a much better spur performance than earlier DDS chips, and
I have been tempted to use one for an LO in a radio, it looks clean enough
to work nicely.

==============

Generally, I'd say your phase noise will be the same either way, and
perhaps even a little quieter with the 200 MHz clock. The internal
reference multipliers probably add a little phase noise, multipliers usually
do add a little extra noise, not than the normal 20log(N) one might expect
from theory.

Reference multiplers DO allow running the DDS output to a higher
frequency, which is often a major desing goal, but if all you want is 20 MHz
output then you are fine with a 200 MHz reference.


Jim Pennell
N6BIU


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Old September 16th 05, 08:23 PM
Mauro
 
Posts: n/a
Default

I'm not going to use internal multiplier. I'm driving it at 200MHz directly.
I agree that internal multiplier is adding noise. You can see that from the
datasheet.
Checked with an AOR7030 receiver the output seems to be quite clear and
sharp.
Not a real measurement, but better than some other PLL.
73
Mauro

"Jim" wrote in message
...
On Wed, 14 Sep 2005 20:29:09 GMT, "Mauro" wrote:

I'm not an expert and need some help.
I've build a DDS around an AD9951.
I drive it at 400MHz from a source at 200MHz multiplied by 2. I get an
output freq of 20MHz.
I now drive it directly from the same source at 200MHz. I changed the
register inside DDS to still get 20MHz on output.
I do not have any possibility to measure the phase noise.
So the question: is it possible to estimate if the phase noise of the

20MHz
output is getting better, worst or is it going to remain the same?
Thanks for the support.
73
Mauro



The AD9951 has a much better spur performance than earlier DDS chips,

and
I have been tempted to use one for an LO in a radio, it looks clean enough
to work nicely.

==============

Generally, I'd say your phase noise will be the same either way, and
perhaps even a little quieter with the 200 MHz clock. The internal
reference multipliers probably add a little phase noise, multipliers

usually
do add a little extra noise, not than the normal 20log(N) one might expect
from theory.

Reference multiplers DO allow running the DDS output to a higher
frequency, which is often a major desing goal, but if all you want is 20

MHz
output then you are fine with a 200 MHz reference.


Jim Pennell
N6BIU




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Old September 16th 05, 10:11 PM
Harold E. Johnson
 
Posts: n/a
Default


"Mauro" wrote in message
...
I'm not going to use internal multiplier. I'm driving it at 200MHz
directly.
I agree that internal multiplier is adding noise. You can see that from
the
datasheet.
Checked with an AOR7030 receiver the output seems to be quite clear and
sharp.
Not a real measurement, but better than some other PLL.
73
Mauro


The AOR 7030 uses a PLL. It has a dual tank VCO as G3SBI came up with.

W4ZCB


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