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Old July 20th 05, 11:45 PM
Gary Morton
 
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Default Linear amplifier input mathcing circuit

I bought a heatsink/PCB containing two RF transistors (2N6080, 2N6083) at a
radio rally. I'm not sure what frequency it was for but it looks like a 2m or
possibly a 70cm amplifier. It appears to be from the back end of some rig. It
has antenna switching relay and decoupling and RF loads on the collectors. I
intend to re-use it to make a 20W linear for 4m. I have stripped off all the
matching parts between the stages (trimmers, Ls and surface mount type Cs).
When I tested the transistors with a multimeter I was relieved to see that the
BE and BC diodes gave a good reading which suggests that the transistors
are intact.

I have been reading a lot about linear amplifiers and matching circuits from
the usual authors in RSGB and ARRL books. I am slowly getting an understanding
of what is going on. I also have a Motorola databook which gives the datasheet
for the two devices.

The databook shows that the input is capacitive below 180MHz and down to
130MHz (3.18-j4.3). Extending the line on the smith chart it appears that the
input gets more capacitive at 70MHz. My understanding was that a capacitive
input would be counter-acted using a series inductor, however the original
amplifier clearly had a capacitor from base to ground. In PW April 96 I
stumbled across a 50MHz linear amplifier based on a 2N6080 and 2N6082 combo
(TA6U2 from Spectrum Communications - which may still be available today). For
both stages there is 1nF of capacitance from base to ground. In a third design
for which I have the schematic a 2m amplifier using a 2N6080 as the first
stage also has capacitance from base to ground. I'm puzzled.

Anyway I constructed a T type input match using 200pF trimmers and a 3 turn
coil rescued from the original circuit: C from i/p to common, C from common to
gnd, L from common to transistor base. I read somewhere that this was called a
"sloppy match". Using a MFJ259B as a signal generator I can adjust the
trimmers to get a match at both 50MHz or 70MHz. Interestingly adjusting from
the centre frequency the bandwidth of SWR less than 1.1 is greater at 50MHz
than 70MHz. I'm guessing that this match circuit has multiple solutions for a
fixed L depending upon Q, and that Q is lower at 50MHz.

I understood that the L in my match would combine with the L of the transistor
input impedance which would just result in a bigger overall L in the match
circuit. Certainly this circuit appears to work.

-So why in three seperate designs do I see large capacitance between the base
of the transistor and ground?

Using the usual formula Zout=(Vcc*Vcc)/(2*Po)=(13*13)/(2*4)=21 I have added a
100nF and 22ohm resistor in series from the collector to ground to give what I
hope is a sensible load (to test out the circuit). This will later be replaced
with another match circuit, which I assume will need to match from 20ohm
instead of 50ohm (as needed for the first stage). When experimenting without
the proper match circuit do you even need a load, or is my idea sensible?

regards...

--Gary (M1GRY)

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Old July 21st 05, 11:15 AM
Joe McElvenney
 
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Hi,

The databook shows that the input is capacitive below 180MHz and down to
130MHz (3.18-j4.3). Extending the line on the smith chart it appears that the
input gets more capacitive at 70MHz. My understanding was that a capacitive
input would be counter-acted using a series inductor, however the original
amplifier clearly had a capacitor from base to ground. In PW April 96 I
stumbled across a 50MHz linear amplifier based on a 2N6080 and 2N6082 combo
(TA6U2 from Spectrum Communications - which may still be available today). For
both stages there is 1nF of capacitance from base to ground. In a third design
for which I have the schematic a 2m amplifier using a 2N6080 as the first
stage also has capacitance from base to ground. I'm puzzled.


-So why in three seperate designs do I see large capacitance between the base
of the transistor and ground?


I don't think you have considered the low value of 'R' being
dealt with here. Translating 3.18-j4.3 @ 130MHz into a parallel
combo gives 8.99ohms||185pF (according to Agilent's AppCAD). Now
with pi-tank matching (possibly not the optimum method), you would
need a shunt capacitance of Xc = R/Q = 681pF using an arbitrary Q
of 5. So a capacitor of 497pF (half your 1nF) together with the
184pF of the device would do nicely.


Cheers - Joe

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