Pictures available in ABSE

The top trace (yellow) is taken between C4 and R2. The bottom trace (cyan)
is taken at the base of the transistor. There is a switchercad file, but
the simulation will show allot of distortion that really isn't present in
the prototype circuit, because of lots of circuit capactance I suspect. R1
was something I was playing with to try and tame the voltage across L1/C3
being applied to the base.


Hello all,

I was tinkering with this LC oscillator (Colpitts/Clapp) this weekend. I
arrived at the values of C1 and C2 empirically after starting with a crystal
oscillator circuit. The values in the original circuit created a horrid
waveform that looked allot like the simulation. After much tinkering around
and simulating, I come to the conclusion that getting a perfect waveform is
nearly impossible, especially with big swing. It seems that the transistor
likes to take a bite out of the right half of the peak of the wave.

What is the secret to beautiful waveforms? Do I need another LC resonator
on the output to fix it up? I mean, I'm getting a pretty nice wave now, but
there is still some distortion that you can just see at the top of the peaks
on the yellow trace.

How do you control the peak voltages of an LC resonattor without mangling
the waveform? The waveform at the junction of L1/C3 is of course quite
beautiful, how do I get it from there to the output? ;-)

I realize that I will need a buffer stage(s) before I can make any real use
of the signal, but I want the input to the buffer to be as perfect as
possible.

Thanks :-)

On Mar 19, 9:23 am, "Anthony Fremont" wrote:
Pictures available in ABSE

The top trace (yellow) is taken between C4 and R2. The bottom trace (cyan)
is taken at the base of the transistor. There is a switchercad file, but
the simulation will show allot of distortion that really isn't present in
the prototype circuit, because of lots of circuit capactance I suspect. R1
was something I was playing with to try and tame the voltage across L1/C3
being applied to the base.

Hello all,

I was tinkering with this LC oscillator (Colpitts/Clapp) this weekend. I
arrived at the values of C1 and C2 empirically after starting with a crystal
oscillator circuit. The values in the original circuit created a horrid
waveform that looked allot like the simulation. After much tinkering around
and simulating, I come to the conclusion that getting a perfect waveform is
nearly impossible, especially with big swing. It seems that the transistor
likes to take a bite out of the right half of the peak of the wave.

What is the secret to beautiful waveforms? Do I need another LC resonator
on the output to fix it up? I mean, I'm getting a pretty nice wave now, but
there is still some distortion that you can just see at the top of the peaks
on the yellow trace.

How do you control the peak voltages of an LC resonattor without mangling
the waveform? The waveform at the junction of L1/C3 is of course quite
beautiful, how do I get it from there to the output? ;-)

I realize that I will need a buffer stage(s) before I can make any real use
of the signal, but I want the input to the buffer to be as perfect as
possible.

Thanks :-)


The waveform in a high Q tank that's lightly coupled to the amplifier
should be very nearly sinusoidal. If in addition, the amplifier
remains linear and represents a constant impedance over the whole
cycle of the waveform, then the waveforms should everywhere be
sinusoidal. If the amplifier+tank has barely enough loop gain to
sustain oscillation, then clipping will be minimal, but it's also
possible to detect the level and control the gain of the amplifier.
You could, for example, use a light bulb like HP did in their original
audio oscillator. Beware, though, that best oscillator performance in
other regards may not be achieved the same way you achieve lowest
harmonic distortion. Be careful that you optimize the right things
for your application.

In the work I do, I need to measure distortion, and the generators I
use don't have low enough distortion in their outputs to be directly
useful. The distortion levels in the "raw" outputs are generally
about -40 to -50dBc. I use filters to make things better, and can get
to -140dBc distortion levels fairly easily. If it's low harmonic
distortion you want, I'd suggest that it may be better to just put a
filter on the output of the oscillator that has only moderately low
harmonic output, and not worry so much about that aspect of oscillator
performance. Filters work well when the oscillator frequency range is
about 1.5:1 or less. Much more than that and you'd need to switch in
different filters depending on the oscillator frequency.

Cheers,
Tom

K7ITM wrote:
On Mar 19, 9:23 am, "Anthony Fremont" wrote:
The waveform in a high Q tank that's lightly coupled to the amplifier
should be very nearly sinusoidal. If in addition, the amplifier
remains linear and represents a constant impedance over the whole
cycle of the waveform, then the waveforms should everywhere be
sinusoidal. If the amplifier+tank has barely enough loop gain to
sustain oscillation, then clipping will be minimal, but it's also
possible to detect the level and control the gain of the amplifier.
You could, for example, use a light bulb like HP did in their original
audio oscillator. Beware, though, that best oscillator performance in
other regards may not be achieved the same way you achieve lowest
harmonic distortion. Be careful that you optimize the right things
for your application.

After reading the other replies, it seems aparent that the shape of the
signal from the first stage is not that critical, it is stability and phase
noise that are most important. So, I should put things back where there is
clipping to be sure that the oscillator oscillates and then clean up the
signal in subsequent stages.

In the work I do, I need to measure distortion, and the generators I
use don't have low enough distortion in their outputs to be directly
useful. The distortion levels in the "raw" outputs are generally
about -40 to -50dBc. I use filters to make things better, and can get
to -140dBc distortion levels fairly easily. If it's low harmonic
distortion you want, I'd suggest that it may be better to just put a
filter on the output of the oscillator that has only moderately low
harmonic output, and not worry so much about that aspect of oscillator
performance. Filters work well when the oscillator frequency range is
about 1.5:1 or less. Much more than that and you'd need to switch in
different filters depending on the oscillator frequency.

Thanks. :-)

"Anthony Fremont" wrote in message
...
K7ITM wrote:
On Mar 19, 9:23 am, "Anthony Fremont" wrote:
The waveform in a high Q tank that's lightly coupled to the amplifier
should be very nearly sinusoidal. If in addition, the amplifier
remains linear and represents a constant impedance over the whole
cycle of the waveform, then the waveforms should everywhere be
sinusoidal. If the amplifier+tank has barely enough loop gain to
sustain oscillation, then clipping will be minimal, but it's also
possible to detect the level and control the gain of the amplifier.
You could, for example, use a light bulb like HP did in their original
audio oscillator. Beware, though, that best oscillator performance in
other regards may not be achieved the same way you achieve lowest
harmonic distortion. Be careful that you optimize the right things
for your application.

After reading the other replies, it seems aparent that the shape of the
signal from the first stage is not that critical, it is stability and
phase noise that are most important. So, I should put things back where
there is clipping to be sure that the oscillator oscillates and then clean
up the signal in subsequent stages.

I have never seen clipping. These things are supposed to limit in cutoff,
not saturation. As the signal build up, the conduction angle gets smaller
and smaller until the device runs out of gain. That is another way of saying
that the DC value of the gate voltage gets more negative the bigger the
amplitude. This works out automatically with a JFET. You need about 10K -
100K DC resistance from gate to ground. Using a bipolar transistor is not a
good idea.

Tam

Tam/WB2TT wrote:
"Anthony Fremont" wrote in message

I have never seen clipping. These things are supposed to limit in
cutoff, not saturation. As the signal build up, the conduction angle
gets smaller and smaller until the device runs out of gain. That is
another way of saying that the DC value of the gate voltage gets more
negative the bigger the amplitude. This works out automatically with
a JFET. You need about 10K - 100K DC resistance from gate to ground.
Using a bipolar transistor is not a good idea.

I was wondering about the load that a bipolar would present. I will see if
I can find a JFET in my junk pile, thank you. :-)

On Mon, 19 Mar 2007 16:25:26 -0500, "Anthony Fremont"
wrote:

Tam/WB2TT wrote:
"Anthony Fremont" wrote in message

I have never seen clipping. These things are supposed to limit in
cutoff, not saturation. As the signal build up, the conduction angle
gets smaller and smaller until the device runs out of gain. That is
another way of saying that the DC value of the gate voltage gets more
negative the bigger the amplitude. This works out automatically with
a JFET. You need about 10K - 100K DC resistance from gate to ground.
Using a bipolar transistor is not a good idea.

I was wondering about the load that a bipolar would present. I will see if
I can find a JFET in my junk pile, thank you. :-)

Without going to the purity levels that Tom requires, I've always found that
bipolars can be used to produce a fairly reasonable "visibly sinusoidal" (see
note) waveform. Follow the oscillator with an amplifier stage which drives a
limiter/clipper, and use that to control a gain element in the oscillator. It's
like the incandescent non-linearity arrangement except the oscillator stage
waveform remains fairly clean.

(Note: Harmonic distortion not readily discernible on a CRO)

Tam/WB2TT wrote:

I have never seen clipping. These things are supposed to limit in
cutoff, not saturation. As the signal build up, the conduction angle
gets smaller and smaller until the device runs out of gain. That is
another way of saying that the DC value of the gate voltage gets more
negative the bigger the amplitude. This works out automatically with
a JFET. You need about 10K - 100K DC resistance from gate to ground.
Using a bipolar transistor is not a good idea.

I have now changed it to an MPF102 that I've had laying around for many
years. It works great, thanks.
:-)

"Anthony Fremont" wrote in message
...
Tam/WB2TT wrote:

I have never seen clipping. These things are supposed to limit in
cutoff, not saturation. As the signal build up, the conduction angle
gets smaller and smaller until the device runs out of gain. That is
another way of saying that the DC value of the gate voltage gets more
negative the bigger the amplitude. This works out automatically with
a JFET. You need about 10K - 100K DC resistance from gate to ground.
Using a bipolar transistor is not a good idea.

I have now changed it to an MPF102 that I've had laying around for many
years. It works great, thanks.
:-)

Glad it worked out. By the way the feedback path is through the capacitive
network between source and gate. That would be more obvious in the
configuration that uses a tapped inductor, but works the same way. Leaving
out the diode was the right thing to do; it just adds to the noise. I don't
know what kind of stability and linearity you need, but if that is
important, do not use the common type of ceramic capacitors that are meant
for bypassing. They are lossy, and their value varies with applied voltage.
Use mica, NPO ceramic, or Mylar and similar for larger values.

Tam

Hello Anthony,

1.
Please set the following option to sitch off data reduction/compression
in the result file..

..options plotwinsize=0

2.
You have to set a small maximum timestep in the .TRAN line too.
Maybe a value of 0.01*Period of oscillation if you hunt for very low
distortion.


Can you send me your file (.asc-file and model-file?) to check it?

Best regards,
Helmut




"Anthony Fremont" schrieb im Newsbeitrag
...
Pictures available in ABSE

The top trace (yellow) is taken between C4 and R2. The bottom trace
(cyan)
is taken at the base of the transistor. There is a switchercad file, but
the simulation will show allot of distortion that really isn't present in
the prototype circuit, because of lots of circuit capactance I suspect.
R1
was something I was playing with to try and tame the voltage across L1/C3
being applied to the base.


Hello all,

I was tinkering with this LC oscillator (Colpitts/Clapp) this weekend. I
arrived at the values of C1 and C2 empirically after starting with a
crystal
oscillator circuit. The values in the original circuit created a horrid
waveform that looked allot like the simulation. After much tinkering
around
and simulating, I come to the conclusion that getting a perfect waveform
is
nearly impossible, especially with big swing. It seems that the
transistor
likes to take a bite out of the right half of the peak of the wave.

What is the secret to beautiful waveforms? Do I need another LC resonator
on the output to fix it up? I mean, I'm getting a pretty nice wave now,
but
there is still some distortion that you can just see at the top of the
peaks
on the yellow trace.

How do you control the peak voltages of an LC resonattor without mangling
the waveform? The waveform at the junction of L1/C3 is of course quite
beautiful, how do I get it from there to the output? ;-)

I realize that I will need a buffer stage(s) before I can make any real
use
of the signal, but I want the input to the buffer to be as perfect as
possible.

Thanks :-)

Helmut Sennewald wrote:
Hello Anthony,

1.
Please set the following option to sitch off data
reduction/compression in the result file..

.options plotwinsize=0

2.
You have to set a small maximum timestep in the .TRAN line too.
Maybe a value of 0.01*Period of oscillation if you hunt for very low
distortion.


Can you send me your file (.asc-file and model-file?) to check it?

In alt.binaries.schematics.electronic I have posted the schematic, the
asc-file and an oscilloscope screen shot from an actual circuit. Here is
the asc-file contents:

Version 4
SHEET 1 880 708
WIRE -704 -96 -784 -96
WIRE -400 -96 -704 -96
WIRE -224 -96 -400 -96
WIRE -704 -16 -704 -96
WIRE -400 -16 -400 -96
WIRE -224 32 -224 -96
WIRE -544 80 -592 80
WIRE -400 80 -400 64
WIRE -400 80 -464 80
WIRE -288 80 -400 80
WIRE -592 128 -592 80
WIRE -400 144 -400 80
WIRE -784 160 -784 -96
WIRE -400 240 -400 208
WIRE -224 240 -224 128
WIRE -224 240 -400 240
WIRE -80 240 -224 240
WIRE 48 240 -16 240
WIRE -784 272 -784 240
WIRE -704 272 -704 48
WIRE -592 272 -592 208
WIRE -400 272 -400 240
WIRE -224 288 -224 240
WIRE -592 384 -592 336
WIRE -400 384 -400 336
WIRE -400 384 -592 384
WIRE -224 384 -224 368
WIRE -224 384 -400 384
WIRE -400 448 -400 384
FLAG -784 272 0
FLAG -400 448 0
FLAG -704 272 0
FLAG 48 320 0
SYMBOL voltage -784 144 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 5.8
SYMBOL res -416 -32 R0
SYMATTR InstName R3
SYMATTR Value 100k
SYMBOL npn -288 32 R0
SYMATTR InstName Q3
SYMATTR Value 2N3904
SYMBOL cap -416 144 R0
SYMATTR InstName C1
SYMATTR Value .01µ
SYMBOL res -240 272 R0
SYMATTR InstName R7
SYMATTR Value 1k
SYMBOL cap -416 272 R0
SYMATTR InstName C2
SYMATTR Value 500p
SYMBOL ind -608 112 R0
SYMATTR InstName L1
SYMATTR Value 20µ
SYMATTR SpiceLine Rser=.1
SYMBOL cap -608 272 R0
SYMATTR InstName C3
SYMATTR Value 200p
SYMBOL cap -16 224 R90
WINDOW 0 0 32 VBottom 0
WINDOW 3 32 32 VTop 0
SYMATTR InstName C4
SYMATTR Value 270p
SYMBOL res -448 64 R90
WINDOW 0 0 56 VBottom 0
WINDOW 3 32 56 VTop 0
SYMATTR InstName R1
SYMATTR Value .001
SYMBOL cap -720 -16 R0
SYMATTR InstName C5
SYMATTR Value 10µ
SYMBOL res 32 224 R0
SYMATTR InstName R2
SYMATTR Value 10000k
TEXT -792 360 Left 0 !.tran 50uS

Thank you for your time.


Best regards,
Helmut




"Anthony Fremont" schrieb im Newsbeitrag
...
Pictures available in ABSE

The top trace (yellow) is taken between C4 and R2. The bottom trace
(cyan)
is taken at the base of the transistor. There is a switchercad
file, but the simulation will show allot of distortion that really
isn't present in the prototype circuit, because of lots of circuit
capactance I suspect. R1
was something I was playing with to try and tame the voltage across
L1/C3 being applied to the base.


Hello all,

I was tinkering with this LC oscillator (Colpitts/Clapp) this
weekend. I arrived at the values of C1 and C2 empirically after
starting with a crystal
oscillator circuit. The values in the original circuit created a
horrid waveform that looked allot like the simulation. After much
tinkering around
and simulating, I come to the conclusion that getting a perfect
waveform is
nearly impossible, especially with big swing. It seems that the
transistor
likes to take a bite out of the right half of the peak of the wave.

What is the secret to beautiful waveforms? Do I need another LC
resonator on the output to fix it up? I mean, I'm getting a pretty
nice wave now, but
there is still some distortion that you can just see at the top of
the peaks
on the yellow trace.

How do you control the peak voltages of an LC resonattor without
mangling the waveform? The waveform at the junction of L1/C3 is of
course quite beautiful, how do I get it from there to the output? ;-) I
realize that I will need a buffer stage(s) before I can make any
real use
of the signal, but I want the input to the buffer to be as perfect as
possible.

Thanks :-)