"W3JDR" wrote in message
...
Anyone know of a PIC-based frequency locked loop for VFO control? I'm
looking for something that can be programmed with a frequency word, and
then
it aquires and maintains the frequency. I've seen frequency 'stabilizers'
but most of them just hold the frequency once it's been manually set.
There
are also PIC-assisted DDS designs, but these are more complex thatn I
want,
use more power then I'd like, and are not as clean as a simple voltage
controlled oscillator.

A number of the MicroChip MPs have 16-bit internal counters that claim to
run as high as 50 MHz. The carry out of that counter could be used to cause
an interrupt to extend the number of bits in the count.

But you would need to precede the count chain with a gate of known and
accurate count-window duration. I've thought about the subject and would
try a 74AC-series flip-flop as the "gate". The gating control signal would
be applied to its DC-reset. A 74HC4060 running with a "32" kHz clock
crystal could provide the gating signal. Properly biasing the flip-flop's
clock input might result in fairly good sensitivity.

These MicroChip MPs have a pulse-width-modulated [PWM] output, but it's only
8- or 10-bit resolution. It could be dithered for more resolution, but that
would require an even greater time-constant in the AFC applied to the VCO -
probably intolerable. A simple, inaccurate, 8-bit D-to-A chip might be used
for rough AFC voltage, with interpolation using the PWM.

WARNING: All the above is just hand-waving.

73 de bob w3otc

PIC Frequency Locked Loop
 

"W3JDR" wrote in message
...
Anyone know of a PIC-based frequency locked loop for VFO control? I'm
looking for something that can be programmed with a frequency word, and
then
it aquires and maintains the frequency. I've seen frequency 'stabilizers'
but most of them just hold the frequency once it's been manually set.
There
are also PIC-assisted DDS designs, but these are more complex thatn I
want,
use more power then I'd like, and are not as clean as a simple voltage
controlled oscillator.

A number of the MicroChip MPs have 16-bit internal counters that claim to
run as high as 50 MHz. The carry out of that counter could be used to cause
an interrupt to extend the number of bits in the count.

But you would need to precede the count chain with a gate of known and
accurate count-window duration. I've thought about the subject and would
try a 74AC-series flip-flop as the "gate". The gating control signal would
be applied to its DC-reset. A 74HC4060 running with a "32" kHz clock
crystal could provide the gating signal. Properly biasing the flip-flop's
clock input might result in fairly good sensitivity.

These MicroChip MPs have a pulse-width-modulated [PWM] output, but it's only
8- or 10-bit resolution. It could be dithered for more resolution, but that
would require an even greater time-constant in the AFC applied to the VCO -
probably intolerable. A simple, inaccurate, 8-bit D-to-A chip might be used
for rough AFC voltage, with interpolation using the PWM.

WARNING: All the above is just hand-waving.

73 de bob w3otc

"W3JDR" wrote in message
...
Anyone know of a PIC-based frequency locked loop for VFO control? I'm
looking for something that can be programmed with a frequency word, and
then
it aquires and maintains the frequency. I've seen frequency 'stabilizers'
but most of them just hold the frequency once it's been manually set.
There
are also PIC-assisted DDS designs, but these are more complex thatn I
want,
use more power then I'd like, and are not as clean as a simple voltage
controlled oscillator.
It seems to me that the PIC should be able to measure the frequency,
determine the error, and operate a very simple charge-pump/VCO to put the
frequency where it wants.


I've seen a couple of MCU-controlled "Huff and Puff" stabilisers on the web.

You'll find a couple he

http://www.hanssummers.com/radio/huffpuff/contents.htm

Leon
--
Leon Heller, G1HSM

http://www.geocities.com/leon_heller

"W3JDR" wrote in message
...
Anyone know of a PIC-based frequency locked loop for VFO control? I'm
looking for something that can be programmed with a frequency word, and
then
it aquires and maintains the frequency. I've seen frequency 'stabilizers'
but most of them just hold the frequency once it's been manually set.
There
are also PIC-assisted DDS designs, but these are more complex thatn I
want,
use more power then I'd like, and are not as clean as a simple voltage
controlled oscillator.
It seems to me that the PIC should be able to measure the frequency,
determine the error, and operate a very simple charge-pump/VCO to put the
frequency where it wants.


I've seen a couple of MCU-controlled "Huff and Puff" stabilisers on the web.

You'll find a couple he

http://www.hanssummers.com/radio/huffpuff/contents.htm

Leon
--
Leon Heller, G1HSM

http://www.geocities.com/leon_heller

As I said in my original post, there are plenty of 'stabilizers' available
for the taking. I have also seen a few PIC frequency counter implementations
that don't need any external gating. There are also plenty of PLL chips
which would do the job. However, I have not seen a software application for
the PIC that does it all without (hardly any) external hardware...this
should be possible.

What I want to do is create a tiny, low-power, stable & accurate HF
frequency source module. I think I can implement it with 2 packages...the
PIC and a VCO made out of biased-up CMOS inverters. I want to be able to
'hard-code' a frequency in some cases (fixed-frequency oscillator), or send
an arbitrary frequency word for variable frequency control in other cases
(VFO). This would be a very useful 'building-block' for making HF
communications gear.

The important factors for my applications are good tuning resolution,
reasonable lock-up time, and minimal phase noise. Of course, defining 'how
good is good enough' is somewhat subjective. Whether it's done as a PLL or
an FLL is somewhat semantic as most PLL synthesizer's really don't control
the short-term phase real well anyway.

Joe
W3JDR


"W3JDR" wrote in message
...
Anyone know of a PIC-based frequency locked loop for VFO control? I'm
looking for something that can be programmed with a frequency word, and
then
it aquires and maintains the frequency. I've seen frequency 'stabilizers'
but most of them just hold the frequency once it's been manually set.
There
are also PIC-assisted DDS designs, but these are more complex thatn I
want,
use more power then I'd like, and are not as clean as a simple voltage
controlled oscillator.
It seems to me that the PIC should be able to measure the frequency,
determine the error, and operate a very simple charge-pump/VCO to put the
frequency where it wants.

Joe
W3JDR

As I said in my original post, there are plenty of 'stabilizers' available
for the taking. I have also seen a few PIC frequency counter implementations
that don't need any external gating. There are also plenty of PLL chips
which would do the job. However, I have not seen a software application for
the PIC that does it all without (hardly any) external hardware...this
should be possible.

What I want to do is create a tiny, low-power, stable & accurate HF
frequency source module. I think I can implement it with 2 packages...the
PIC and a VCO made out of biased-up CMOS inverters. I want to be able to
'hard-code' a frequency in some cases (fixed-frequency oscillator), or send
an arbitrary frequency word for variable frequency control in other cases
(VFO). This would be a very useful 'building-block' for making HF
communications gear.

The important factors for my applications are good tuning resolution,
reasonable lock-up time, and minimal phase noise. Of course, defining 'how
good is good enough' is somewhat subjective. Whether it's done as a PLL or
an FLL is somewhat semantic as most PLL synthesizer's really don't control
the short-term phase real well anyway.

Joe
W3JDR


"W3JDR" wrote in message
...
Anyone know of a PIC-based frequency locked loop for VFO control? I'm
looking for something that can be programmed with a frequency word, and
then
it aquires and maintains the frequency. I've seen frequency 'stabilizers'
but most of them just hold the frequency once it's been manually set.
There
are also PIC-assisted DDS designs, but these are more complex thatn I
want,
use more power then I'd like, and are not as clean as a simple voltage
controlled oscillator.
It seems to me that the PIC should be able to measure the frequency,
determine the error, and operate a very simple charge-pump/VCO to put the
frequency where it wants.

Joe
W3JDR

On Tue, 22 Jul 2003 11:44:07 +0000, W3JDR wrote:

Anyone know of a PIC-based frequency locked loop for VFO control? I'm
looking for something that can be programmed with a frequency word, and then
it aquires and maintains the frequency. I've seen frequency 'stabilizers'
but most of them just hold the frequency once it's been manually set. There
are also PIC-assisted DDS designs, but these are more complex thatn I want,
use more power then I'd like, and are not as clean as a simple voltage
controlled oscillator.

Mine is at http://homepage.eircom.net/~ei9gq/stab.html
Have a look at Hans Summers and Richard Hoskings web-pages.

It seems to me that the PIC should be able to measure the frequency,
determine the error, and operate a very simple charge-pump/VCO to put the
frequency where it wants.

Joe
W3JDR


What you are describing is a conventional PLL. PIC based
stabilisers or 'frequency locked loops' usually have very
long gate times for counting the frequency and a fairly
narrow frequency control range. My circuit uses a 100mS
gate time and a control range of +/- a couple of KHz.

If you want to cover a larger frequency range with your
VCO, you will need to use a much shorter gate time to
keep tight control of the VCO frequency. This will
increase the tuning steps and will also increase the
phase noise on the VCO output. You soon run into the
the same trade offs and compromises that you get with
any PLL design.

A PLL/DDS combination seems to be the best way to
go. I recently built a 21MHz VFO for a 10M transceiver.
The 21MHz VCO is mixed with the output from a 17MHz
crystal oscillator. The resulting 4MHz signal is
phase locked with a 4MHz signal from an AD9835 DDS
chip. The DDS is controlled by a PIC16F84. I use the
10M rig to drive a homebrew transverter for 144MHz.
I am delighted with the results. The RX is free from
the usual birdies you get with a DDS VFO. The phase
noise is low enough that I can operate within a few
KHz of some very strong local stations on 2M SSB.

73, Ed. EI9GQ.


--

Remove 'X' to reply by e-mail
http://homepage.eircom.net/~ei9gq
Linux 2.4.21

On Tue, 22 Jul 2003 11:44:07 +0000, W3JDR wrote:

Anyone know of a PIC-based frequency locked loop for VFO control? I'm
looking for something that can be programmed with a frequency word, and then
it aquires and maintains the frequency. I've seen frequency 'stabilizers'
but most of them just hold the frequency once it's been manually set. There
are also PIC-assisted DDS designs, but these are more complex thatn I want,
use more power then I'd like, and are not as clean as a simple voltage
controlled oscillator.

Mine is at http://homepage.eircom.net/~ei9gq/stab.html
Have a look at Hans Summers and Richard Hoskings web-pages.

It seems to me that the PIC should be able to measure the frequency,
determine the error, and operate a very simple charge-pump/VCO to put the
frequency where it wants.

Joe
W3JDR


What you are describing is a conventional PLL. PIC based
stabilisers or 'frequency locked loops' usually have very
long gate times for counting the frequency and a fairly
narrow frequency control range. My circuit uses a 100mS
gate time and a control range of +/- a couple of KHz.

If you want to cover a larger frequency range with your
VCO, you will need to use a much shorter gate time to
keep tight control of the VCO frequency. This will
increase the tuning steps and will also increase the
phase noise on the VCO output. You soon run into the
the same trade offs and compromises that you get with
any PLL design.

A PLL/DDS combination seems to be the best way to
go. I recently built a 21MHz VFO for a 10M transceiver.
The 21MHz VCO is mixed with the output from a 17MHz
crystal oscillator. The resulting 4MHz signal is
phase locked with a 4MHz signal from an AD9835 DDS
chip. The DDS is controlled by a PIC16F84. I use the
10M rig to drive a homebrew transverter for 144MHz.
I am delighted with the results. The RX is free from
the usual birdies you get with a DDS VFO. The phase
noise is low enough that I can operate within a few
KHz of some very strong local stations on 2M SSB.

73, Ed. EI9GQ.


--

Remove 'X' to reply by e-mail
http://homepage.eircom.net/~ei9gq
Linux 2.4.21

In article , "W3JDR"
writes:

The important factors for my applications are good tuning resolution,
reasonable lock-up time, and minimal phase noise. Of course, defining 'how
good is good enough' is somewhat subjective. Whether it's done as a PLL or
an FLL is somewhat semantic as most PLL synthesizer's really don't control
the short-term phase real well anyway.

Short-term phase stability almost always lies in the VCO design with
some disturbance possible by an incorrect loop filter. That has little
to do whether the VCO is used with a PLL or DDS.

To be phase-stable (i.e., reduce short-term jitter), the VCO supply rails
should be bypassed adequately well up into the RF range of the VCO
and the control voltage line absolutely free from any loop-induced
pickup almost to the VCO's RF range. Iron powder or ferrite beads,
even slabs of the stuff, can halp on the control line. Stability also
involves using whatever active device in the oscillator at its optimum
lowest-noise point...that's device dependent and not all manufacturers
supply such data.

In truth, I've never had experience with the PLL or DDS dividers as an
integral part of the frequency control determining processor. I've always
had to work some to make the external-divider kind lay down and be
nice. I would imagine there's more fun and games with a combined
type using a Microchip processor being both controller and divider. :-)

Len Anderson
retired (from regular hours) electronic engineer person

In article , "W3JDR"
writes:

The important factors for my applications are good tuning resolution,
reasonable lock-up time, and minimal phase noise. Of course, defining 'how
good is good enough' is somewhat subjective. Whether it's done as a PLL or
an FLL is somewhat semantic as most PLL synthesizer's really don't control
the short-term phase real well anyway.

Short-term phase stability almost always lies in the VCO design with
some disturbance possible by an incorrect loop filter. That has little
to do whether the VCO is used with a PLL or DDS.

To be phase-stable (i.e., reduce short-term jitter), the VCO supply rails
should be bypassed adequately well up into the RF range of the VCO
and the control voltage line absolutely free from any loop-induced
pickup almost to the VCO's RF range. Iron powder or ferrite beads,
even slabs of the stuff, can halp on the control line. Stability also
involves using whatever active device in the oscillator at its optimum
lowest-noise point...that's device dependent and not all manufacturers
supply such data.

In truth, I've never had experience with the PLL or DDS dividers as an
integral part of the frequency control determining processor. I've always
had to work some to make the external-divider kind lay down and be
nice. I would imagine there's more fun and games with a combined
type using a Microchip processor being both controller and divider. :-)

Len Anderson
retired (from regular hours) electronic engineer person

This is an intriguing discussion
The problem with a FLL will be as Joe and Ed say - that to get reasonable resolution in a FLL , you have to count a lot of pulses and this takes a while. You are comparing one count to the next - ie one count is equivalent to the reference, while the next count is equivalent to the VCO signal. In my design (which is based on Ed's originally) the gate time is 100msec, which means the comparison freq and therefore resolution is about 10 Hz, and therefore the lockup time is pretty slow. I presume it would be possible to have the loop capture lock, but I have not explored this. The loop filter would have to be carefuly designed and I suspect lockup time would be pretty long. I think a better idea would be as Joe says to have the coarse resolution set by a DAC and a coarse tuning varicap without any loop. The fine resolution could then be set by a second freq locked system with a swing of say 5 KHz as in our current system. You would have to have a voltage tunable VFO which means phase noise might not be so good.

I have been thinking about an alternative for HF, which is somewhat more complex, but should give excellent phase noise performance. I would use a microwave synthesizer usin DDS/PLL techniques for say 1000-1500 MHz
See http://www.qsl.net/ke5fx/synth.html for a suitable design. This could then be fed to a programmable divider - a second LMX2326 could be used with the main divider output being the output of the synth. The rest of the second PLL chip (reference divider/phase comparator etc) would not be used. The programmable divider is set to give an output anywhere in the HF (or VHF for that matter) spectrum as desired. The phase noise performance of this synth at microwaves is in the order of -90dBc/Hz at 10KHz offset.Dividing it from say 1200 MHz to 30 MHz would improve this by 20log N where N is the division ratio to give phase noise of better than -130 dBc/Hz at 10 KHz offset, with almost infinite resolution and digital settability. The only downside is computational overhead for the processor, but this shouldnt be a problem with modern micros. Current drain could be reduced over the current design when the new AD DDS chips become available (AD9951 etc)
Anyone have any comments?

Richard


W3JDR wrote in message ...
Ed,

You said:

If you want to cover a larger frequency range with your
VCO, you will need to use a much shorter gate time to
keep tight control of the VCO frequency. This will
increase the tuning steps and will also increase the
phase noise on the VCO output. You soon run into the
the same trade offs and compromises that you get with
any PLL design.


I don't completely agree. there are several ways to skin this cat. One might be to implement a simple R-2R D-A converter in the PIC to do coarse frequency tuning according to a lookup table, and let the 'huff & puff' stabilizer do the fine corrections. No different than manually setting the tuning capacitor on the VFO and then enabling the stabilizer.

Having said that, there are PIC firmware designs that implement a 40+ MHz counter with 10hz resolution and 100 msec count interval. Combine this with a simple charge pump, and I don't see an FLL with any worse performance than a hardware PLL. Admittedly it's not as good as a DDS for resolution/speed, but it might have advantages for simplicity, power consumption, spectral purity and cost.

Bottom line is, I know most of the other ways to generate a clean & stable programmable RF source. What I wanted to find out is if anyone had done it with a PIC and little else. You came close with your stabilizer, but it can only stabilize, not acquire.

Joe

This is an intriguing discussion
The problem with a FLL will be as Joe and Ed say - that to get reasonable resolution in a FLL , you have to count a lot of pulses and this takes a while. You are comparing one count to the next - ie one count is equivalent to the reference, while the next count is equivalent to the VCO signal. In my design (which is based on Ed's originally) the gate time is 100msec, which means the comparison freq and therefore resolution is about 10 Hz, and therefore the lockup time is pretty slow. I presume it would be possible to have the loop capture lock, but I have not explored this. The loop filter would have to be carefuly designed and I suspect lockup time would be pretty long. I think a better idea would be as Joe says to have the coarse resolution set by a DAC and a coarse tuning varicap without any loop. The fine resolution could then be set by a second freq locked system with a swing of say 5 KHz as in our current system. You would have to have a voltage tunable VFO which means phase noise might not be so good.

I have been thinking about an alternative for HF, which is somewhat more complex, but should give excellent phase noise performance. I would use a microwave synthesizer usin DDS/PLL techniques for say 1000-1500 MHz
See http://www.qsl.net/ke5fx/synth.html for a suitable design. This could then be fed to a programmable divider - a second LMX2326 could be used with the main divider output being the output of the synth. The rest of the second PLL chip (reference divider/phase comparator etc) would not be used. The programmable divider is set to give an output anywhere in the HF (or VHF for that matter) spectrum as desired. The phase noise performance of this synth at microwaves is in the order of -90dBc/Hz at 10KHz offset.Dividing it from say 1200 MHz to 30 MHz would improve this by 20log N where N is the division ratio to give phase noise of better than -130 dBc/Hz at 10 KHz offset, with almost infinite resolution and digital settability. The only downside is computational overhead for the processor, but this shouldnt be a problem with modern micros. Current drain could be reduced over the current design when the new AD DDS chips become available (AD9951 etc)
Anyone have any comments?

Richard


W3JDR wrote in message ...
Ed,

You said:

If you want to cover a larger frequency range with your
VCO, you will need to use a much shorter gate time to
keep tight control of the VCO frequency. This will
increase the tuning steps and will also increase the
phase noise on the VCO output. You soon run into the
the same trade offs and compromises that you get with
any PLL design.


I don't completely agree. there are several ways to skin this cat. One might be to implement a simple R-2R D-A converter in the PIC to do coarse frequency tuning according to a lookup table, and let the 'huff & puff' stabilizer do the fine corrections. No different than manually setting the tuning capacitor on the VFO and then enabling the stabilizer.

Having said that, there are PIC firmware designs that implement a 40+ MHz counter with 10hz resolution and 100 msec count interval. Combine this with a simple charge pump, and I don't see an FLL with any worse performance than a hardware PLL. Admittedly it's not as good as a DDS for resolution/speed, but it might have advantages for simplicity, power consumption, spectral purity and cost.

Bottom line is, I know most of the other ways to generate a clean & stable programmable RF source. What I wanted to find out is if anyone had done it with a PIC and little else. You came close with your stabilizer, but it can only stabilize, not acquire.

Joe

Joe

I actually have (had?) a project in flight to do just that. Unfortunately,
pressures on my time have prevented me from making much progress lately.
Perhaps as the weather cools.

My background is as a chemical process control engineer. This seems like an
obvious application of traditional process control algorithms. Even more to
the point, I have a history of applying simple computers to process control
problems, and this seems like a good candidate.

I spent a LOT of time working on the basic VCO. In my case, it happens I
was looking for something in the 9 MHz neighborhood, to build a 20 meter rig
with a 4.9 MHz IF (to take advantage of cheap crystals, of course). It
turns out to be a lot harder than it sounds to come up with a reasonable
stable VCO at that frequency.

In my case I wanted to be able to tune the frequency, but this is really not
so different from what you want. I get the frequency by twiddling the shaft
encoder, but once the frequency is gotten, I now plug it into the
controller, so the second part is basically what you are talking about.

I, too, had assumed when changing frequency I may need to go to a ten times
a second sample, then change to once a second after I got there, but I'm not
entirely sure this is what I'll do. Given that you have a VCO and a DAC,
and the VCO has a relatively fixed relationship between the control voltage
and the frequency, I ought to be able to output the voltage for the desired
frequency immediately, then fine tune based on the count.

Which brings up another issue ... the DAC. In my case, I wanted 70 kHz of
coverage, so I needed a DAC with a fair bit of resolution. 8 bit DACs are
cheap, but when you get into the 12-16 bit neighborhood they tend to not be
so cheap. Also, it seems like the lion's share of serial DACs are surface
mount, and you really want serial to keep the parts count down.

My initial thinking was that you might be able to get away with an 8 bit DAC
given that you really only want one frequency. Assuming a 4.915 IF, you
would want to build a VCO with a range of about 9.1549 to 9.1551 - seems
pretty tight, although it looks like a candidate for a VXO, which could be a
lot simpler problem. The challenge you have is that you can't have the
frequency hopping about for more than a couple of Hz for PSK, so you really
want about 1 Hz or better resolution on your DAC.

In fact, as I think about it, the VXO looks like a great candidate. Since
the VXO can be quite stable, you aren't going to need to be quite so quick
to respond to disturbances that want to move the frequency, so the once per
second sample to allow 1Hz control isn't going to be such a big deal.

If you build the VXO such that, under "typical" conditions it is spot on
with the DAC output at half scale, now you can preload the reset in your PIC
controller to deliver half scale at turn on. The total drift of a VXO ought
to be only a few tens of Hz anyway, so the PIC shooed drive the frequency to
be spot on within 5 or 10 seconds. It's unlikely that you will be able to
find a QSO in that amount of time, anyway. Of course, thermal disturbances
are going to want to move the VXO a bit, but these are slow, so the PIC
should have no trouble keeping them in check.

This probably doesn't really deliver to your "building block" concept, but
it seems pretty straightforward for PSK. If you want a generic building
block, as best I can tell you will need 1) a good, stable VCO (hard); and 2)
a high-resolution DAC (expensive).

For my project, I am starting to lean toward the AD9850 as being simpler and
cheaper, although I started out where you are now, feeling like it was
overkill for the purpose. Still, I'd like to prove the concept of using PID
control for frequency.

...

"W3JDR" wrote in message
...
Richard,

Now you're talking my language...almost!

Joe

I actually have (had?) a project in flight to do just that. Unfortunately,
pressures on my time have prevented me from making much progress lately.
Perhaps as the weather cools.

My background is as a chemical process control engineer. This seems like an
obvious application of traditional process control algorithms. Even more to
the point, I have a history of applying simple computers to process control
problems, and this seems like a good candidate.

I spent a LOT of time working on the basic VCO. In my case, it happens I
was looking for something in the 9 MHz neighborhood, to build a 20 meter rig
with a 4.9 MHz IF (to take advantage of cheap crystals, of course). It
turns out to be a lot harder than it sounds to come up with a reasonable
stable VCO at that frequency.

In my case I wanted to be able to tune the frequency, but this is really not
so different from what you want. I get the frequency by twiddling the shaft
encoder, but once the frequency is gotten, I now plug it into the
controller, so the second part is basically what you are talking about.

I, too, had assumed when changing frequency I may need to go to a ten times
a second sample, then change to once a second after I got there, but I'm not
entirely sure this is what I'll do. Given that you have a VCO and a DAC,
and the VCO has a relatively fixed relationship between the control voltage
and the frequency, I ought to be able to output the voltage for the desired
frequency immediately, then fine tune based on the count.

Which brings up another issue ... the DAC. In my case, I wanted 70 kHz of
coverage, so I needed a DAC with a fair bit of resolution. 8 bit DACs are
cheap, but when you get into the 12-16 bit neighborhood they tend to not be
so cheap. Also, it seems like the lion's share of serial DACs are surface
mount, and you really want serial to keep the parts count down.

My initial thinking was that you might be able to get away with an 8 bit DAC
given that you really only want one frequency. Assuming a 4.915 IF, you
would want to build a VCO with a range of about 9.1549 to 9.1551 - seems
pretty tight, although it looks like a candidate for a VXO, which could be a
lot simpler problem. The challenge you have is that you can't have the
frequency hopping about for more than a couple of Hz for PSK, so you really
want about 1 Hz or better resolution on your DAC.

In fact, as I think about it, the VXO looks like a great candidate. Since
the VXO can be quite stable, you aren't going to need to be quite so quick
to respond to disturbances that want to move the frequency, so the once per
second sample to allow 1Hz control isn't going to be such a big deal.

If you build the VXO such that, under "typical" conditions it is spot on
with the DAC output at half scale, now you can preload the reset in your PIC
controller to deliver half scale at turn on. The total drift of a VXO ought
to be only a few tens of Hz anyway, so the PIC shooed drive the frequency to
be spot on within 5 or 10 seconds. It's unlikely that you will be able to
find a QSO in that amount of time, anyway. Of course, thermal disturbances
are going to want to move the VXO a bit, but these are slow, so the PIC
should have no trouble keeping them in check.

This probably doesn't really deliver to your "building block" concept, but
it seems pretty straightforward for PSK. If you want a generic building
block, as best I can tell you will need 1) a good, stable VCO (hard); and 2)
a high-resolution DAC (expensive).

For my project, I am starting to lean toward the AD9850 as being simpler and
cheaper, although I started out where you are now, feeling like it was
overkill for the purpose. Still, I'd like to prove the concept of using PID
control for frequency.

...

"W3JDR" wrote in message
...
Richard,

Now you're talking my language...almost!

Joe
I agree the LO is the hardest part of a radio, especially if you want fine resolution and digital programmability.
I would be interested in your VCO circuits using inverters if you are willing to share these. What sort of phase noise performance have you got with these circuits?
I wonder if you could use a coax transmission line as the tunable element, and ground different sections of it using diodes for different bands? I would be aiming to use the LO at 4X operating freq, so it can be divided for a quadrature generating circuit. I plan to use the Tayloe circuit as a bilateral SSB RX/TX, using a quad bus switch (say the FST3253)

Richard
W3JDR wrote in message ...
Richard,

Now you're talking my language...almost!

I also want to built an ultra-portable rig, except I want a PSK31-only rig that I can pack with my laptop for my travels. I know Small Wonder Labs already makes this, but this is a homebrew forum, and that's what I want to do. When building any HF rig, the frequency control systems are usually the most complex part. I'm hoping that by developing this little configurable & programmable module, I'll have a building block I can press into service for VFO's BFO's, and other heterodyne oscillator applications.

The Atmel chips are certainly good candidates for the application...low power, fast, powerful, & cheap. I know that with a PIC (and possibly the Atmel) chip, you can make a 50mhz frequency counter with as much resolution as you care to program into it, commensurate with the counting speed tradeoff. Thus, 10hz measurement resolution could be achieved with a 10 frequency corrections per second. As you pointed out, the counter could be programmed for a lower resolution, faster update mode that would be used to acquire, and then slip into the slower, higher resolution mode to maintain. A simple 8 bit R-2R D/A converter could be used for coarse tuning so that the loop doesn't have to work so hard. In a VFO with a 500khz bandspread, that would initially place the frequency within a few khz. I've built VCO's using fast CMOS unbuffered inverters that work to over 150Mhz, so that part isn't difficult.

Overall, I think all the technology is proven...someone just has to do it. My PICLite Starter Kit should arrive any day (only $36!) and I hope to get started.

Joe
W3JDR




"

Joe
I agree the LO is the hardest part of a radio, especially if you want fine resolution and digital programmability.
I would be interested in your VCO circuits using inverters if you are willing to share these. What sort of phase noise performance have you got with these circuits?
I wonder if you could use a coax transmission line as the tunable element, and ground different sections of it using diodes for different bands? I would be aiming to use the LO at 4X operating freq, so it can be divided for a quadrature generating circuit. I plan to use the Tayloe circuit as a bilateral SSB RX/TX, using a quad bus switch (say the FST3253)

Richard
W3JDR wrote in message ...
Richard,

Now you're talking my language...almost!

I also want to built an ultra-portable rig, except I want a PSK31-only rig that I can pack with my laptop for my travels. I know Small Wonder Labs already makes this, but this is a homebrew forum, and that's what I want to do. When building any HF rig, the frequency control systems are usually the most complex part. I'm hoping that by developing this little configurable & programmable module, I'll have a building block I can press into service for VFO's BFO's, and other heterodyne oscillator applications.

The Atmel chips are certainly good candidates for the application...low power, fast, powerful, & cheap. I know that with a PIC (and possibly the Atmel) chip, you can make a 50mhz frequency counter with as much resolution as you care to program into it, commensurate with the counting speed tradeoff. Thus, 10hz measurement resolution could be achieved with a 10 frequency corrections per second. As you pointed out, the counter could be programmed for a lower resolution, faster update mode that would be used to acquire, and then slip into the slower, higher resolution mode to maintain. A simple 8 bit R-2R D/A converter could be used for coarse tuning so that the loop doesn't have to work so hard. In a VFO with a 500khz bandspread, that would initially place the frequency within a few khz. I've built VCO's using fast CMOS unbuffered inverters that work to over 150Mhz, so that part isn't difficult.

Overall, I think all the technology is proven...someone just has to do it. My PICLite Starter Kit should arrive any day (only $36!) and I hope to get started.

Joe
W3JDR




"

If the VCO can be made to have good short-term stability (we could discuss
this requirement for a long time), then there are more options for how to
make the control loop. I was toying with the idea of 2 simple 8-bit D/A's,
one operating a coarse tune varactor and one running a fine tune varactor.
Of course the problem here is that the overall 16 bit tuning curve would not
be monotonic, and could have numerous slope reversals. This might be
overcome by having a 'learn' mode where the system builds something like a
frequency lookup table for subsequent open-loop random access. Once you've
pre-tuned to within approx 1 part in 65,000, the closed loop part could take
over. As to +/- a few hertz wandering affecting the PSK31 signal, I think
it's mostly a matter of how fast/slow the wander rate is. Slow, small
frequency wandering will probably be tolerated by PSK-31 software's AFC
function.

Joe

"xpyttl" wrote in message
...
Joe

I actually have (had?) a project in flight to do just that.
Unfortunately,
pressures on my time have prevented me from making much progress lately.
Perhaps as the weather cools.

My background is as a chemical process control engineer. This seems like
an
obvious application of traditional process control algorithms. Even more
to
the point, I have a history of applying simple computers to process
control
problems, and this seems like a good candidate.

I spent a LOT of time working on the basic VCO. In my case, it happens I
was looking for something in the 9 MHz neighborhood, to build a 20 meter
rig
with a 4.9 MHz IF (to take advantage of cheap crystals, of course). It
turns out to be a lot harder than it sounds to come up with a reasonable
stable VCO at that frequency.

In my case I wanted to be able to tune the frequency, but this is really
not
so different from what you want. I get the frequency by twiddling the
shaft
encoder, but once the frequency is gotten, I now plug it into the
controller, so the second part is basically what you are talking about.

I, too, had assumed when changing frequency I may need to go to a ten
times
a second sample, then change to once a second after I got there, but I'm
not
entirely sure this is what I'll do. Given that you have a VCO and a DAC,
and the VCO has a relatively fixed relationship between the control
voltage
and the frequency, I ought to be able to output the voltage for the
desired
frequency immediately, then fine tune based on the count.

Which brings up another issue ... the DAC. In my case, I wanted 70 kHz of
coverage, so I needed a DAC with a fair bit of resolution. 8 bit DACs are
cheap, but when you get into the 12-16 bit neighborhood they tend to not
be
so cheap. Also, it seems like the lion's share of serial DACs are surface
mount, and you really want serial to keep the parts count down.

My initial thinking was that you might be able to get away with an 8 bit
DAC
given that you really only want one frequency. Assuming a 4.915 IF, you
would want to build a VCO with a range of about 9.1549 to 9.1551 - seems
pretty tight, although it looks like a candidate for a VXO, which could be
a
lot simpler problem. The challenge you have is that you can't have the
frequency hopping about for more than a couple of Hz for PSK, so you
really
want about 1 Hz or better resolution on your DAC.

In fact, as I think about it, the VXO looks like a great candidate. Since
the VXO can be quite stable, you aren't going to need to be quite so quick
to respond to disturbances that want to move the frequency, so the once
per
second sample to allow 1Hz control isn't going to be such a big deal.

If you build the VXO such that, under "typical" conditions it is spot on
with the DAC output at half scale, now you can preload the reset in your
PIC
controller to deliver half scale at turn on. The total drift of a VXO
ought
to be only a few tens of Hz anyway, so the PIC shooed drive the frequency
to
be spot on within 5 or 10 seconds. It's unlikely that you will be able to
find a QSO in that amount of time, anyway. Of course, thermal
disturbances
are going to want to move the VXO a bit, but these are slow, so the PIC
should have no trouble keeping them in check.

This probably doesn't really deliver to your "building block" concept, but
it seems pretty straightforward for PSK. If you want a generic building
block, as best I can tell you will need 1) a good, stable VCO (hard); and
2)
a high-resolution DAC (expensive).

For my project, I am starting to lean toward the AD9850 as being simpler
and
cheaper, although I started out where you are now, feeling like it was
overkill for the purpose. Still, I'd like to prove the concept of using
PID
control for frequency.

..

"W3JDR" wrote in message
...
Richard,

Now you're talking my language...almost!

If the VCO can be made to have good short-term stability (we could discuss
this requirement for a long time), then there are more options for how to
make the control loop. I was toying with the idea of 2 simple 8-bit D/A's,
one operating a coarse tune varactor and one running a fine tune varactor.
Of course the problem here is that the overall 16 bit tuning curve would not
be monotonic, and could have numerous slope reversals. This might be
overcome by having a 'learn' mode where the system builds something like a
frequency lookup table for subsequent open-loop random access. Once you've
pre-tuned to within approx 1 part in 65,000, the closed loop part could take
over. As to +/- a few hertz wandering affecting the PSK31 signal, I think
it's mostly a matter of how fast/slow the wander rate is. Slow, small
frequency wandering will probably be tolerated by PSK-31 software's AFC
function.

Joe

"xpyttl" wrote in message
...
Joe

I actually have (had?) a project in flight to do just that.
Unfortunately,
pressures on my time have prevented me from making much progress lately.
Perhaps as the weather cools.

My background is as a chemical process control engineer. This seems like
an
obvious application of traditional process control algorithms. Even more
to
the point, I have a history of applying simple computers to process
control
problems, and this seems like a good candidate.

I spent a LOT of time working on the basic VCO. In my case, it happens I
was looking for something in the 9 MHz neighborhood, to build a 20 meter
rig
with a 4.9 MHz IF (to take advantage of cheap crystals, of course). It
turns out to be a lot harder than it sounds to come up with a reasonable
stable VCO at that frequency.

In my case I wanted to be able to tune the frequency, but this is really
not
so different from what you want. I get the frequency by twiddling the
shaft
encoder, but once the frequency is gotten, I now plug it into the
controller, so the second part is basically what you are talking about.

I, too, had assumed when changing frequency I may need to go to a ten
times
a second sample, then change to once a second after I got there, but I'm
not
entirely sure this is what I'll do. Given that you have a VCO and a DAC,
and the VCO has a relatively fixed relationship between the control
voltage
and the frequency, I ought to be able to output the voltage for the
desired
frequency immediately, then fine tune based on the count.

Which brings up another issue ... the DAC. In my case, I wanted 70 kHz of
coverage, so I needed a DAC with a fair bit of resolution. 8 bit DACs are
cheap, but when you get into the 12-16 bit neighborhood they tend to not
be
so cheap. Also, it seems like the lion's share of serial DACs are surface
mount, and you really want serial to keep the parts count down.

My initial thinking was that you might be able to get away with an 8 bit
DAC
given that you really only want one frequency. Assuming a 4.915 IF, you
would want to build a VCO with a range of about 9.1549 to 9.1551 - seems
pretty tight, although it looks like a candidate for a VXO, which could be
a
lot simpler problem. The challenge you have is that you can't have the
frequency hopping about for more than a couple of Hz for PSK, so you
really
want about 1 Hz or better resolution on your DAC.

In fact, as I think about it, the VXO looks like a great candidate. Since
the VXO can be quite stable, you aren't going to need to be quite so quick
to respond to disturbances that want to move the frequency, so the once
per
second sample to allow 1Hz control isn't going to be such a big deal.

If you build the VXO such that, under "typical" conditions it is spot on
with the DAC output at half scale, now you can preload the reset in your
PIC
controller to deliver half scale at turn on. The total drift of a VXO
ought
to be only a few tens of Hz anyway, so the PIC shooed drive the frequency
to
be spot on within 5 or 10 seconds. It's unlikely that you will be able to
find a QSO in that amount of time, anyway. Of course, thermal
disturbances
are going to want to move the VXO a bit, but these are slow, so the PIC
should have no trouble keeping them in check.

This probably doesn't really deliver to your "building block" concept, but
it seems pretty straightforward for PSK. If you want a generic building
block, as best I can tell you will need 1) a good, stable VCO (hard); and
2)
a high-resolution DAC (expensive).

For my project, I am starting to lean toward the AD9850 as being simpler
and
cheaper, although I started out where you are now, feeling like it was
overkill for the purpose. Still, I'd like to prove the concept of using
PID
control for frequency.

..

"W3JDR" wrote in message
...
Richard,

Now you're talking my language...almost!

Richard,
Essentially, you take whatever is the latest & fastest version of a '74HCU04. (The "U" is very important...it MUST be unbuffered). You capacitively couple a varactor to the input and another to the output and drive them from the same tuning voltage. An inductor from output to input completes the circuit, where L resonates the two varactors. Using appropriate varactors, I have made HF VCO's that tune almost a 3:1 range. I have operated this circuit at over 150MHz. I don't have numbers for phase noise but it was good....not as good as a crystal of course, but pretty good. This particular VCO was used as the first LO in an HF (60MHz) spectrum analyzer. It was driven from a phase detector whose other input was a DDS. The PLL/DDS combo allowed fine tuning resolution along with wide loop bandwidth, resulting in a very good, fast tuning LO.


Joe
W3JDR

"Richard Hosking" wrote in message . au...
Joe
I agree the LO is the hardest part of a radio, especially if you want fine resolution and digital programmability.
I would be interested in your VCO circuits using inverters if you are willing to share these. What sort of phase noise performance have you got with these circuits?
I wonder if you could use a coax transmission line as the tunable element, and ground different sections of it using diodes for different bands? I would be aiming to use the LO at 4X operating freq, so it can be divided for a quadrature generating circuit. I plan to use the Tayloe circuit as a bilateral SSB RX/TX, using a quad bus switch (say the FST3253)

Richard
W3JDR wrote in message ...
Richard,

Now you're talking my language...almost!

I also want to built an ultra-portable rig, except I want a PSK31-only rig that I can pack with my laptop for my travels. I know Small Wonder Labs already makes this, but this is a homebrew forum, and that's what I want to do. When building any HF rig, the frequency control systems are usually the most complex part. I'm hoping that by developing this little configurable & programmable module, I'll have a building block I can press into service for VFO's BFO's, and other heterodyne oscillator applications.

The Atmel chips are certainly good candidates for the application...low power, fast, powerful, & cheap. I know that with a PIC (and possibly the Atmel) chip, you can make a 50mhz frequency counter with as much resolution as you care to program into it, commensurate with the counting speed tradeoff. Thus, 10hz measurement resolution could be achieved with a 10 frequency corrections per second. As you pointed out, the counter could be programmed for a lower resolution, faster update mode that would be used to acquire, and then slip into the slower, higher resolution mode to maintain. A simple 8 bit R-2R D/A converter could be used for coarse tuning so that the loop doesn't have to work so hard. In a VFO with a 500khz bandspread, that would initially place the frequency within a few khz. I've built VCO's using fast CMOS unbuffered inverters that work to over 150Mhz, so that part isn't difficult.

Overall, I think all the technology is proven...someone just has to do it. My PICLite Starter Kit should arrive any day (only $36!) and I hope to get started.

Joe
W3JDR




"

Richard,
Essentially, you take whatever is the latest & fastest version of a '74HCU04. (The "U" is very important...it MUST be unbuffered). You capacitively couple a varactor to the input and another to the output and drive them from the same tuning voltage. An inductor from output to input completes the circuit, where L resonates the two varactors. Using appropriate varactors, I have made HF VCO's that tune almost a 3:1 range. I have operated this circuit at over 150MHz. I don't have numbers for phase noise but it was good....not as good as a crystal of course, but pretty good. This particular VCO was used as the first LO in an HF (60MHz) spectrum analyzer. It was driven from a phase detector whose other input was a DDS. The PLL/DDS combo allowed fine tuning resolution along with wide loop bandwidth, resulting in a very good, fast tuning LO.


Joe
W3JDR

"Richard Hosking" wrote in message . au...
Joe
I agree the LO is the hardest part of a radio, especially if you want fine resolution and digital programmability.
I would be interested in your VCO circuits using inverters if you are willing to share these. What sort of phase noise performance have you got with these circuits?
I wonder if you could use a coax transmission line as the tunable element, and ground different sections of it using diodes for different bands? I would be aiming to use the LO at 4X operating freq, so it can be divided for a quadrature generating circuit. I plan to use the Tayloe circuit as a bilateral SSB RX/TX, using a quad bus switch (say the FST3253)

Richard
W3JDR wrote in message ...
Richard,

Now you're talking my language...almost!

I also want to built an ultra-portable rig, except I want a PSK31-only rig that I can pack with my laptop for my travels. I know Small Wonder Labs already makes this, but this is a homebrew forum, and that's what I want to do. When building any HF rig, the frequency control systems are usually the most complex part. I'm hoping that by developing this little configurable & programmable module, I'll have a building block I can press into service for VFO's BFO's, and other heterodyne oscillator applications.

The Atmel chips are certainly good candidates for the application...low power, fast, powerful, & cheap. I know that with a PIC (and possibly the Atmel) chip, you can make a 50mhz frequency counter with as much resolution as you care to program into it, commensurate with the counting speed tradeoff. Thus, 10hz measurement resolution could be achieved with a 10 frequency corrections per second. As you pointed out, the counter could be programmed for a lower resolution, faster update mode that would be used to acquire, and then slip into the slower, higher resolution mode to maintain. A simple 8 bit R-2R D/A converter could be used for coarse tuning so that the loop doesn't have to work so hard. In a VFO with a 500khz bandspread, that would initially place the frequency within a few khz. I've built VCO's using fast CMOS unbuffered inverters that work to over 150Mhz, so that part isn't difficult.

Overall, I think all the technology is proven...someone just has to do it. My PICLite Starter Kit should arrive any day (only $36!) and I hope to get started.

Joe
W3JDR




"

This has been an interesting discussion and some good ideas have arisen. I
thought I might add my 2c into the pot.

I have been working in a related area, PLL of precision references using a
micro. As well as references for 5 and 10MHz, I have a simple transmitter
for 80/40/30m that uses a VCXO and phase locks it to an external precision
reference, such as a GPS or TV sync. I use 50 or 100Hz as the loop
frequency, and achieve stability of 2 parts in 10^7 with no real trouble,
even with a room temp cheap crystal, and incredibly low phase noise and low
sidebands (the 50Hz sidebands about 50dB down and the carrier phase noise
is -30dB only 0.1Hz out from the carrier).

Sure, lockup time is very slow, which isn't important in this application,
but you guys might like to consider some of my ideas on the subject:

* My VCXO is actually the micro's crystal. I use an ATMEL 2313, and use the
16 bit timer as the main divider. This is where you plug in the frequency
you want - for example, for 3.8MHz you divide by 3800, as the counter
reloads at 1kHz (actually, any multiple of 50Hz or 100Hz would do).

* The PLL operates by undersampling the counter at 50 or 100Hz. This adds
gain to the loop, since 10 or 20 times the phase shift occurs, but it does
mean there's an ambiguity in frequency every 50 or 100Hz. You might have to
rethink that. You could count right down to 100Hz with a VCXO as high as
6.5MHz (limited by the size of the counter, not the micro speed). To go
higher, use a divider ahead of the micro. The 2313 micro will run at 16MHz
easily, so 20m is no problem.

* I use a simple 8 bit software driven PWM D-A converter. It can easily be
extended to more than 8 bit, but the more bits, the slower it gets, so
becomes harder to get rid of the PWM sample clock. I run it at 1kHz, 8 bit,
which you would expect to give a strong 1000/256 = 3.9 Hz component, but I
get around that through "PWM randomization" - instead of incrementing the
PWM counter by one, I increment it by 13, which randomizes the output and
increases the effective PWM clock to about 40Hz. BTW, this technique also
works with hardware (R-2R) D-A converters, so can be used to extend 8 bit to
10 or 12 bit easily. 12 bit would need only 4 bit PWM.

* I keep the hardware gain (i.e. the voltage to frequency conversion of the
varicap) as LOW AS POSSIBLE and control the system gain in the firmware. I
also have filters in the firmware and techniques to remove dud phase
measurements which can happen when using a TV frame frequency reference.

* I use the UART to control the device, and also to get telemetry back, for
example the PWM loop voltage. The whole system operates in a 1kHz timer
interrupt, so the main processor can do other things (in my case it runs a
beacon, a real time clock, and sends telemetry).

* My transmitter circuit has only 3 chips. The micro, a 74HC00 that acts as
the 40mW transmitter, and a sync separator for the TV timing reference.

I think some of these things would have application in a 20m PSK receiver.
The tuning range required is small, would suit a VCXO, and there's no reason
why you couldn't step the frequency in 100Hz or 50Hz steps. Use a 1MHz
reference crystal divided to 100Hz to lock the VCXO. You'd just need to up
the settling speed by perhaps using a hardware D-A. You could change the
divider by commands from the UART.
Keep the discussion going! Very interesting!

73,
Murray ZL1BPU
www.qsl.net/zl1bpu/micro

This has been an interesting discussion and some good ideas have arisen. I
thought I might add my 2c into the pot.

I have been working in a related area, PLL of precision references using a
micro. As well as references for 5 and 10MHz, I have a simple transmitter
for 80/40/30m that uses a VCXO and phase locks it to an external precision
reference, such as a GPS or TV sync. I use 50 or 100Hz as the loop
frequency, and achieve stability of 2 parts in 10^7 with no real trouble,
even with a room temp cheap crystal, and incredibly low phase noise and low
sidebands (the 50Hz sidebands about 50dB down and the carrier phase noise
is -30dB only 0.1Hz out from the carrier).

Sure, lockup time is very slow, which isn't important in this application,
but you guys might like to consider some of my ideas on the subject:

* My VCXO is actually the micro's crystal. I use an ATMEL 2313, and use the
16 bit timer as the main divider. This is where you plug in the frequency
you want - for example, for 3.8MHz you divide by 3800, as the counter
reloads at 1kHz (actually, any multiple of 50Hz or 100Hz would do).

* The PLL operates by undersampling the counter at 50 or 100Hz. This adds
gain to the loop, since 10 or 20 times the phase shift occurs, but it does
mean there's an ambiguity in frequency every 50 or 100Hz. You might have to
rethink that. You could count right down to 100Hz with a VCXO as high as
6.5MHz (limited by the size of the counter, not the micro speed). To go
higher, use a divider ahead of the micro. The 2313 micro will run at 16MHz
easily, so 20m is no problem.

* I use a simple 8 bit software driven PWM D-A converter. It can easily be
extended to more than 8 bit, but the more bits, the slower it gets, so
becomes harder to get rid of the PWM sample clock. I run it at 1kHz, 8 bit,
which you would expect to give a strong 1000/256 = 3.9 Hz component, but I
get around that through "PWM randomization" - instead of incrementing the
PWM counter by one, I increment it by 13, which randomizes the output and
increases the effective PWM clock to about 40Hz. BTW, this technique also
works with hardware (R-2R) D-A converters, so can be used to extend 8 bit to
10 or 12 bit easily. 12 bit would need only 4 bit PWM.

* I keep the hardware gain (i.e. the voltage to frequency conversion of the
varicap) as LOW AS POSSIBLE and control the system gain in the firmware. I
also have filters in the firmware and techniques to remove dud phase
measurements which can happen when using a TV frame frequency reference.

* I use the UART to control the device, and also to get telemetry back, for
example the PWM loop voltage. The whole system operates in a 1kHz timer
interrupt, so the main processor can do other things (in my case it runs a
beacon, a real time clock, and sends telemetry).

* My transmitter circuit has only 3 chips. The micro, a 74HC00 that acts as
the 40mW transmitter, and a sync separator for the TV timing reference.

I think some of these things would have application in a 20m PSK receiver.
The tuning range required is small, would suit a VCXO, and there's no reason
why you couldn't step the frequency in 100Hz or 50Hz steps. Use a 1MHz
reference crystal divided to 100Hz to lock the VCXO. You'd just need to up
the settling speed by perhaps using a hardware D-A. You could change the
divider by commands from the UART.
Keep the discussion going! Very interesting!

73,
Murray ZL1BPU
www.qsl.net/zl1bpu/micro