In: . com, wrote:
Some radios already output the signal after the IF. This is what feeds
a Sherwood synch demo:
http://www.sherweng.com/indepth.html
I'm not saying I'ev done this myself at 455Khz, but I know the theory
and have done phase lock decimation demodulation in voice band data
modems.

In this particular application, all the multiband tuning has been done
by the radio. All you are doing is the final demod. I'm not sure I can
explain it better than that.

The oversampled decimation demodulation sounds more complicated than it
is provided you understand a bit of digital signal processing. If you
know about the concept of aliasing, then what you are doing to demod
the 455KHz signal is to alias it back to baseband. Let's say I sampled
the 455Khz signal at 4*455Khz. Now I have this stream of samples. Label
the stream 1 2 3 4 1 2 3 4 etc. where the numbers correspond to the
sample clock phase, which is 4 times the 455Khz signal. Now make two
stream of data such that they are 1 -3 1 -3 1 -3 etc and 2 -4 2 -4 2 -4
etc. This effectively beats the signal down to baseband and at the same
time derives the signal in quadrature. WIth the quadrature signal, you
can isolate the sidebands.

The phase lock loop is used to generate the oversampled clock. A PLL
basicly does what the name says, i.e. locks its oscillator to the
reference oscillator. To get the 4x oversampled signal, you insert a
divide by 4 after the oscillator. Now the oscillator will run 4x faster
to lock to the reference.

Thank you very much for the explanation(s)!

I think for now anyway... I should focus on the more simplified designs
and "work up" to this level.

Jamie
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