Thread: dBm and Voltage
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Old June 8th 05, 09:27 PM
K7ITM
 
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nanchez wrote:
Hi again.

One last question (for this thread) about jitter... how low it needs to
be ? The LTC6903 datasheet says it's 1% (max value).

Thanks

Hern=E1n S=E1nchez


Because I work with high-speed ADCs, I'm most familiar with articles
about jitter in sampled systems. A sampler and a mixer are pretty
similar, and you should be able to learn a lot from things like Analog
Devices ap notes AN-501 and AN-756, and even the data sheets for
converters like the AD6644 and AD6645. For example, the SNR for an
AD6644 sampling a 30MHz sinewave at 65Msamples/sec is degraded
perceptably by clock jitter of 0.15psec, which is about 0.001% jitter,
expressed as a percentage of the clock period.

I'd post links to the pdf files for those ap notes, but the form I have
them in, they are too long to reliably include in a posting. Just go
to http://www.analog.com/en/index.html and enter AN-501 or AN-756 into
the search box. Also, if you enter "jitter phase noise" (without the
quotes) into a Google search, you'll get LOTS of references.

http://www.maxim-ic.com/appnotes.cfm...te_number/3359 is an ap note
on conversion between clock jitter and phase noise.

Disclaimer: I have not reviewed any of these apnotes critically for
accuracy.

Cheers,
Tom