In article , "Mauro" wrote:
I'm not an expert and need some help.
I've build a DDS around an AD9951.
I drive it at 400MHz from a source at 200MHz multiplied by 2. I get an
output freq of 20MHz.
I now drive it directly from the same source at 200MHz. I changed the
register inside DDS to still get 20MHz on output.
I do not have any possibility to measure the phase noise.
So the question: is it possible to estimate if the phase noise of the 20MHz
output is getting better, worst or is it going to remain the same?
Thanks for the support.
73
Mauro


There are 2 main sources of phase noise in the output of the DDS: The
residual noise of the DDS and the divided down noise of your clock source.

The residual noise is inherent to the DDS and not dependent on the clock. It
is a function of the technology used to build it. This should be specified by
the vendor. It is usually measured by driving 2 identical DDS's from a common
source, measuring the resulting phase noise and subtracting 3 dB to account
for 2 devices.

As for your clock noise: Your 200 MHz clock noise will be increased by 6 dB
by doubling [plus any residual noise of the doubler -- use a Schottkey diode
doubler for best results]. That 6 dB will be subtracted by the extra factor
of 2 in the effective divide factor of the DDS. In short -- its a wash except
for the doubler residual noise reduced by 26 dB [20*log10(20/400)] which
should be insignificant.

Dr. G.