I'm not going to use internal multiplier. I'm driving it at 200MHz directly.
I agree that internal multiplier is adding noise. You can see that from the
datasheet.
Checked with an AOR7030 receiver the output seems to be quite clear and
sharp.
Not a real measurement, but better than some other PLL.
73
Mauro

"Jim" wrote in message
...
On Wed, 14 Sep 2005 20:29:09 GMT, "Mauro" wrote:

I'm not an expert and need some help.
I've build a DDS around an AD9951.
I drive it at 400MHz from a source at 200MHz multiplied by 2. I get an
output freq of 20MHz.
I now drive it directly from the same source at 200MHz. I changed the
register inside DDS to still get 20MHz on output.
I do not have any possibility to measure the phase noise.
So the question: is it possible to estimate if the phase noise of the
20MHz
output is getting better, worst or is it going to remain the same?
Thanks for the support.
73
Mauro



The AD9951 has a much better spur performance than earlier DDS chips,
and
I have been tempted to use one for an LO in a radio, it looks clean enough
to work nicely.

==============

Generally, I'd say your phase noise will be the same either way, and
perhaps even a little quieter with the 200 MHz clock. The internal
reference multipliers probably add a little phase noise, multipliers
usually
do add a little extra noise, not than the normal 20log(N) one might expect
from theory.

Reference multiplers DO allow running the DDS output to a higher
frequency, which is often a major desing goal, but if all you want is 20
MHz
output then you are fine with a 200 MHz reference.


Jim Pennell
N6BIU