"AndyS" wrote in message
oups.com...

William E. Sabin wrote:
"AndyS" andysharpe@
A large increase in a receiver amplifier load impedance just outside the
passband of a crystal filter (or other types of filter) can cause
adjacent
channel susceptibility. The network between the amplifier and the filter
should be designed to prevent this occurrence. There are networks that
can
reverse this effect, so the impedance drops instead of increasing.
Simulations and impedance measurements can verify.

Bill W0IYH

Andy comments:

A good point. But I am not aware of any passive networks than
can roll the impedance off ( or bring it up) fast enough to handle
the adjacent channel problem. Adjacent channels are usually
(in my experience) only a few Khz away while the xtal filter is
usually many Mhz, and a passive network just doesn't change
the impedance that quickly. For those problems, I have always
had to go to a passive resistor source, such as a collector resistor,
or use a coil with a Q low enough to provide the same effect.

If I am incorrect in this, could you please elaborate on what
passive matching circuit you are reccommending. ?

Andy W4OAH

If you have the July 1970 QST there is an article starting on page 35 that
discusses this situation. The load impedance at the drain of the JFET
amplifier increased very rapidly just outside the passband of the xtal
filter as shown in Fig 8. The network in Fig 9A inverts the impedance change
as shown in Fig 9B. This approach was tested for this article. Pages 39 and
40 show the text that applies to this situation. I have confirmed this
approach a few times since then. However, if a fixed resistor is used to
load the drain of the JFET this effect is pretty well mitigated. A large
increase in the load impedance that the amplifier transistor sees can cause
the JFET drain to become overloaded just outside the passband, and I
confirmed this in a homebrew receiver that used a particular xtal filter.
Different filter design approaches (xtal filter black magic) might produce
results somewhat different than mine, so the problem and the solution always
need to be verified experimentally. In general the gain of the JFET etc.
must be restricted so that drain overload is avoided at all frequencies, as
the article explains. Also, if you have the 2004 ARRL Handbook, page 17.5
column one mentions a similar problem that can occur.

Bill W0IYH