Typically the DDS is used as the reference oscillator for the PLL, resulting
in the VCO being at a multiple of the DDS output frequency. The idea being
that the VCO output will have decent phase noise performance with the fine
frequency resolution of the DDS, and resaonably fast stepping times---"the
best of both worlds", you might say.

I discovered an interesting alternative at :
http://lea.hamradio.si/~s57nan/ham_r.../dds_9851.html



This idea has the DDS acting as a programmable divider inside the PLL
feedback loop. Ok, what are the advantages or disadvantages of doing this?
What does it do to the phase noise and lock-up time? And what about the
spurs?

Spurious are down to normal analogue pll levels.

As is phase noise.

Lock-up time is somewhat slower than the DDS, this is reduced down to normal PLL
times as well.

Doing it this way gives you one advantage over a normal analogue pll - small
frequency steps ( = normal analogue pll with fractional divider).

Clive