In article ,
(Mike W) writes:

I have a need to produce an accurate 4Mhz 50% dutycycle TTL squarewave
to use as a timebase.

I have a 10Mhz IQD frequency standard of suitable accuracy. How can I
divide this to produce the 50% duty cycle 4Mhz signal?. Is it even
possible with logic alone?. I can see how to mix with either 6Mhz or
14Mhz, but this then detracts from the required accuracy.

A more direct way, with very little jitter, is to double the 10 MHz
reference with a dual diode arrangment, output tuned to 20 MHz,
then into amplification (if needed), through a Schmitt inverter,
another (!) dual diode doubler with output tuned to 40 MHz. Again
amplification (if needed) and another Schmitt inverter to square
up the 40 MHz. Divide the 40 MHz by 10 in a Johnson counter to
achieve the 50% duty cycle. Broad tuning, no real problems there.
Very direct. Minimal jitter.

Johnson counters aren't common but they aren't made from
unobtainium either. The CD4017 is an example and still available
although it isn't fast enough for this application. Dividing by 10 via
a Johnson counter needs a 5-stage shift register arrangement
which can be done from 74LS or 74F or 74AC components (a
4-bit SR IC plus a flip-flop to complete the 5 stages).

If operating at slower rates, the 50% duty cycle would appear at
the "Carry Out" pin of a CD4017.

A good simple explanation of Johnson counters is at:

http://www.play-hookey.com/digital/johnson_counter.html

Some other suggestions might suggest themselves if you explain
the "timebase" in more detail.

Len Anderson
retired (from regular hours) electronic engineer person