On Tue, 21 Sep 2004 20:56:00 +0200, "Helmut Sennewald"
wrote:

Hello Paul,
Vgs_off seems to be often specified at Id=1nA. The measurement
at such low current levels takes a lot of time and it requires a
very clean test fixture.

How have you measured at exactly Id = 1nA +/-0.1nA ?

Hi Helmut,

Is it 1nA? I thought it was 5. No matter.
Yes, I'd expected someone to point out that the "negligible current"
point was the likely problem area. I can't honestly say that I have,
because my DVM drops out at 0.01mA! However, in the context of the
wide spread of parameters one encounters with FETs., I'm pretty
confident my 'drop-out' zone for current measurement is not too far
off the mark. But you've answered my question and as ever I'm grateful
to you for that.
I actually found it more difficult measuring Id as Vgs approached
zero. The negative tempco of these devices made that part more
challenging. Fortunately I've got a 'peak-hold' button on my meter and
by only connecting the drain circuit for a fraction of a second I was
able to get what I believe to be a valid reading. Certainly good
enough given the cushion one has to build into FET circuit design as a
matter of course, anyway.

A typical datasheet:
http://www.fairchildsemi.com/ds/J3/J310.pdf

Ah, I see they use a 300uS pulse, presumably to keep the device
temperature down?

Regards,

p.