On 10/29/2014 4:41 PM, Lostgallifreyan wrote:
rickman wrote in :

What off the shelf answer?

I just meant in terms of interfacing. Never mind, one of my other replies
might be far more useful. While you can integrate digitally, why do so? It
seems to me (if I haven't missed something I shouldn't) that you might get
away with much less gain before analog integration, then you can boost the
resulting slow signals with much less struggle with gand bandwidth products
and slew rates for low power and such. If you can do it this way, the
resulting slow pulses can be boosted with CMOS which at those speeds will be
pretty much nanopower.

Before integration comes demodulation. How would you demodulate and
integrate in the analog domain on a 100 uW power budget? The signal is
PSK. But that is not the real reason. My goal is to show it is
possible to do this entirely in the digital domain.

The devices I have available are not 100% optimized for low power at low
clock rates, but they are pretty good. If I can find devices that have
lower quiescent current the digital design has potential of being lower
power than the analog approach.

--

Rick