On 12/29/2015 10:29 PM, Jeff Liebermann wrote:
On Tue, 29 Dec 2015 21:20:24 -0500, rickman wrote:

On 12/29/2015 8:17 PM, Jeff Liebermann wrote:
On Tue, 29 Dec 2015 22:14:45 -0000, "gareth"
wrote:

What is interesting is the simplicity of the approach (ignoring the hidden
cost of the ubiquitous PC), but it ignores the multiple harmonics that
come out of DDS chips.

One of the nice things about DDS is the lack of harmonics and
distortion. Given sufficient bits, you won't see much in the way of
harmonics. If there are are any harmonics, it's treated as
"distortion" which in this case means unwanted junk signals. See the
section on "dynamic performance".
http://www.embedded.com/design/configurable-systems/4025078/Understanding-analog-to-digital-converter-specifications
SNR(dB) = (6.02*N) + 1.76 where N = number of bits
So, if you have a 8 bit DDS, all the junk will be down:
(6.02*8)+1.76 = 50 dB
I think that's sufficient for most VNA applications. Of course, you
can introduce other forms of distorition (jitter, non-linearity,
clipping, symmetry, etc) errors in stages after the DDS.

The issue with noise from a DDS is that all noise is not the same. A
DDS is used to produce a sine wave, preferably of a single frequency. A
typical DDS has a phase accumulator word of some number of bits which
establishes the accuracy of the frequency being produced. Then some or
all of those bits are used to produce digital samples of the sine wave.
The quantization noise of the sample produces noise which is fairly
evenly spread across the spectrum, but related more to the clock rate
than the carrier frequency. The quantization noise from the phase word
produces noise which has significant content very close to the carrier.
This noise can not be easily filtered and so is of great concern. The
fewer phase word bits used (called phase truncation) to produce the sine
values the greater the close in noise.

Notice that I didn't use the term "noise" anywhere in my comments.
That was intentional as I was directly addressing the comments about
"multiple harmonics". I didn't want to dive deep into how a DDS
synthesizer works mostly because I don't understand it very well. I
have a few cheap eBay DDS synthesizer boards, some grand ideas, and no
time to play.

You mentioned "distortion" which is the problem with a DDS. The OP's
use of the term "harmonic" shows his lack of familiarity with DDS
technology. It is very simple really. A step size is set by the value
added to an accumulator on each clock cycle. The accumulator is allowed
to wrap around. This generates a ramping value representing the phase
of a vector. The number of bits used in the accumulator and phase step
in conjunction with the clock rate set the frequency resolution of the
ramp.

The next step is to turn the phase into a sine sample. Often a lookup
table is used. Since the number of entries in the table is limited this
limits the phase resolution used to generate the sine sample. The
number of bits in the output of the table set the resolution of the
amplitude. These two resolutions generate very different noise patterns.

There are other ways of generating the sine samples. One is to
approximate by calculation. Calculations can use a series expansion or
various trig identities. These can achieve lower values of distortion
with less hardware than large table lookups.

The final step, if an analog signal is needed, is the DAC conversion. A
DAC introduces its own types of distortion, harmonics and noise.

Nothing complex really. But there are some subtleties.


For the most part you seem to be describing noise created by an ADC or
DAC which is dependent on the number of bits in the sine wave sample.

Exactly. Ignoring noise and jitter, if the DDS DAC has enough bits
and is sufficiently linear, the harmonics will not be a problem for a
VNA which does not have enough display resolution to where the noise
is going to be a problem.

That's like saying "if you ignore the tailpipe emissions, a diesel
engine is very clean". Noise and jitter *is* the limitation of a DDS.
The frequency resolution is easy to make as fine as you wish. The
limitation comes in reducing the close in spurs.


A common DDS chip is the AD9850 which uses a 10 bit DAC and 14 bits
for that phase after truncation:
http://datasheet.octopart.com/AD9850BRS-Analog-Devices-datasheet-88235.pdf
10 bits puts the harmonics theoretically about -60dB down from the
carrier. However, that won't happen as there are other sources of
noise, errors, distortion, junk, non-linearity, etc. At about 3MHz, I
recall seeing about -40dB, which became worse above 25 MHz.

For many apps, such as a lot of radio work, -60 dB is not a very good
number. I seem to recall seeing radio apps where -80 would be a more
respectable value. But then that was military radios so maybe -60 is
just fine for amateur work.

--

Rick