Jeff wrote on 8/3/2017 5:32 AM:

This is another false dichotomy. The aspect of the Shortt clock you are
referring to is that it is *discrete* rather than continuous.

Not correct the phases of the 2 pendulums are *never* in phase. Even when a
kick is given, as of course if they were in phase there would be no need for
a kick.

You don't understand the meaning of "phase". If you said the two
frequencies were never the same I would agree. The slave pendulum runs
slower than the master with the intermittent impulse to adjust the phase.
The relative phase varies with time as a sawtooth function and so at some
point the phase *must* be aligned as the slave passes from being ahead to
being behind. On the next adjustment the phase is adjusted or not. When
properly adjusted the phase of the slave will only be "bumped" every other
adjustment time. On the adjustment times when the slave phase is *not*
adjusted the phase will be in alignment ideally.


So you can clearly see the fact that the slave oscillator is not in
perfect lock step with the master (reference). The same is true in *all*
PLL circuits. The phase of the oscillator is adjusted by the error signal.

When a electronic phase lock loop is locked there is no error as the 2
signals are perfectly in phase. There will only be a change in locked
control voltage if the phase drifts.

You need to go back to PLL 101 class. When the PLL is "locked" it simply
means the error in phase is small enough that the loop can compensate by
varying the VCO frequency. If you understand the math you will see that
this means it will *always* hunt for the perfect alignment. If there is no
integral term in the feedback loop, there will always be a phase error
dependent on the dF/dV slope of the VCO. If there *is* an integral term in
the feedback loop the loop will have small fluctuations as the frequency
adjusts to correct the phase, but when the phase error reaches zero the
frequency error will *not* be zero and the phase error will immediately
become non-zero.


There can be no adjustments without error, so the oscillator will not be
in perfect lockstep with the reference. It will be within some
tolerance... same as the Shortt clock.

No, a phase locked loop has the same accuracy, or tolerance if you wish, as
the reference.

There is always jitter in the output of the PLL that is independent of the
reference clock.


A PLL can be discrete and the phase will move in patterns with small
offsets in frequency at all times. With a continuous phase comparison the
frequency will vary continuously but still will not be "locked" to the
reference with no error.

No it will only vary in sympathy with the reference signal, or with signals
that are not damped by the loop filter due to being faster than the loop
filer can deal with.

Please review your PLL materials. There is no such thing as a PLL that
aligns perfectly with the reference.

--

Rick C