On Mon, 24 May 2004 05:46:01 GMT, "Lord Snooty" wrote:

At 8.000 Mhz and a load consisting of 50 ohms carbon 10W 10% in series with a
capacitance trimmer bank, at an output power level of about 2W, a load
capacitor value of 250 +/- 10pF (-j80 ohms @ 8 MHz) was found to produce a
minimum in the total voltage across the load. Also, as capacitance was
increased over the range 100-700pF, the voltage across the load resistor
increased monotonically.

The latter is easy to explain (it means the source reactance is positive, and
smaller than +j28.4 ohms), but the former is beyond my ken.

Best,
Andrew

Hi Andrew,

You got me confused too.

Is the "load" the resistor, or the resistor-cap combination when you
measure these voltages?

You describe a voltage minimum across the load for a cap setting of
250pF; but you also maintain that the voltage across the load
increases for the variation in capacitance from 100 to 700pF which
contradicts the first measurement.

Further, the construction of a high power semiconductor does not lend
itself to supporting inductive reactances (the junctions are quite
manifestly capacitive in structure). By specification the device is
characterized as exhibiting 27pF @ 1 MHz (for 28Vdc although there is
not much variation until below 10Vdc). There are a world of other
variables to consider, but none portray inductance within the device.
This alone should provoke you to re-examine your premise.

73's
Richard Clark, KB7QHC

"Richard Clark" wrote in message
...
On Mon, 24 May 2004 05:46:01 GMT, "Lord Snooty" wrote:

At 8.000 Mhz and a load consisting of 50 ohms carbon 10W 10% in series
with a
capacitance trimmer bank, at an output power level of about 2W, a load
capacitor value of 250 +/- 10pF (-j80 ohms @ 8 MHz) was found to produce a
minimum in the total voltage across the load. Also, as capacitance was
increased over the range 100-700pF, the voltage across the load resistor
increased monotonically.

The latter is easy to explain (it means the source reactance is positive,
and
smaller than +j28.4 ohms), but the former is beyond my ken.

Best,
Andrew

Hi Andrew,

You got me confused too.

Is the "load" the resistor, or the resistor-cap combination when you
measure these voltages?

You describe a voltage minimum across the load for a cap setting of
250pF; but you also maintain that the voltage across the load
increases for the variation in capacitance from 100 to 700pF which
contradicts the first measurement.

Further, the construction of a high power semiconductor does not lend
itself to supporting inductive reactances (the junctions are quite
manifestly capacitive in structure). By specification the device is
characterized as exhibiting 27pF @ 1 MHz (for 28Vdc although there is
not much variation until below 10Vdc). There are a world of other
variables to consider, but none portray inductance within the device.
This alone should provoke you to re-examine your premise.

73's
Richard Clark, KB7QHC

To clarify
a) "Load" in my context means "load resistor (r) and load capacitor (reactance
jx) in series"
b) The output transistor feeds to the output port through an inductor. One
would therefore expect X, the source reactance, to be positive.

Andrew

On Wed, 26 May 2004 02:07:50 GMT, "Lord Snooty" wrote:

To clarify
a) "Load" in my context means "load resistor (r) and load capacitor (reactance
jx) in series"
b) The output transistor feeds to the output port through an inductor. One
would therefore expect X, the source reactance, to be positive.

Hi Andrew,

a load capacitor value of 250 +/- 10pF (-j80 ohms @ 8 MHz) was found to produce a
minimum in the total voltage across the load.
What was the voltage?
Also, as capacitance was increased over the range 100-700pF, the voltage across the load resistor
increased monotonically.
What were the voltages?
The latter is easy to explain (it means the source reactance is positive, and
smaller than +j28.4 ohms), but the former is beyond my ken.
as the capacitive reactance falls, you note the voltage climbs, this
hardly requires an inductance to explain this. Simple divider action
serves quite well. You have since revealed the inductor buffered
output, but the data is still pretty skimpy to bless it as the major
contributor to source Z.

What are you using to measure this voltage?

73's
Richard Clark, KB7QHC

"Richard Clark" wrote in message
...
On Wed, 26 May 2004 02:07:50 GMT, "Lord Snooty" wrote:
Hi Andrew,

a load capacitor value of 250 +/- 10pF (-j80 ohms @ 8 MHz) was found to
produce a
minimum in the total voltage across the load.
What was the voltage?

Load voltage lies in the 5 to 20 volt peak range, depending on the power
setting.
This minimum represented about a 15% dip.

Also, as capacitance was increased over the range 100-700pF, the voltage
across the load resistor
increased monotonically.
What were the voltages?

Again, a nominal value between 5 and 20 V pk.

The latter is easy to explain (it means the source reactance is positive,
and
smaller than +j28.4 ohms), but the former is beyond my ken.

as the capacitive reactance falls, you note the voltage climbs, this
hardly requires an inductance to explain this. Simple divider action
serves quite well. You have since revealed the inductor buffered
output, but the data is still pretty skimpy to bless it as the major
contributor to source Z.

Agreed, but if I keep increasing the load C (decreasing the capacitative
reactance ), I will see a peak in the voltage across the load resistor, which
will only happen if a conjugate match is occurring.

What are you using to measure this voltage?

A scope probe set to 10x, which has an unmeasurably high DC resistance and a
capacitance of 22 pF (measured). It's a good idea to use the 10x, not 1x,
setting, since the latter contributes about 80 pF, and will change the AC
response of the circuit.

Best,
Andrew

On Thu, 27 May 2004 16:49:26 GMT, "Lord Snooty" wrote:

"Richard Clark" wrote in message
.. .
On Wed, 26 May 2004 02:07:50 GMT, "Lord Snooty" wrote:
Hi Andrew,

a load capacitor value of 250 +/- 10pF (-j80 ohms @ 8 MHz)
was found to produce a minimum in the total voltage across the load.
What was the voltage?

Load voltage lies in the 5 to 20 volt peak range, depending on the power
setting.
This minimum represented about a 15% dip.

Pick ONE power setting. What was the voltage across the load.

Also, as capacitance was increased over the range 100-700pF,
the voltage across the load resistor increased monotonically.
What were the voltages?

Again, a nominal value between 5 and 20 V pk.

Pick the ONE and SAME power setting. What was the voltage across the
load resistor for:
100pF
200pF
300pF
....
700pF

The latter is easy to explain (it means the source reactance is positive,
and
smaller than +j28.4 ohms), but the former is beyond my ken.

as the capacitive reactance falls, you note the voltage climbs, this
hardly requires an inductance to explain this. Simple divider action
serves quite well. You have since revealed the inductor buffered
output, but the data is still pretty skimpy to bless it as the major
contributor to source Z.

Agreed, but if I keep increasing the load C (decreasing the capacitative
reactance ), I will see a peak in the voltage across the load resistor, which
will only happen if a conjugate match is occurring.

This is a violation of terms. Just what constitutes the generator?
At one time you say the combination of the cap-resistor is the load,
hence the source is described ACROSS this series. THEN you isolate
the resistor which pushes the cap back into the source.

You originally asked for the complex impedance of the source, but if
the source contains a variable cap, this makes determination rather a
moving target.

In the world of metrology (folks who measure this stuff for a
living), you have an immutable boundary called the plane of the
source. On one side is everything that can be attributed to the
source and everything on the other side can be attributed to the load.
If there is a transmission line between, then you have two planes, the
plane of the source, and the plane of the load. Everything to the
right of the plane of the load (thinking in a left-right progression)
can be attributed to the load. Between the two planes is a transform.

The plane of the source is commonly the output connector, the plane of
the load is commonly the input connector. Things in between like
tuners, SWR meters, Lines, dividers, splitters, duplexers... are
transforms.

It is perfectly justifiable to make a component like a tuner resident
within (and behind) either plane, but once you do that, it is
considered bad form to go tweaking it and maintain nothing has
happened to the source/load.

What are you using to measure this voltage?

A scope probe set to 10x, which has an unmeasurably high DC resistance and a
capacitance of 22 pF (measured). It's a good idea to use the 10x, not 1x,
setting, since the latter contributes about 80 pF, and will change the AC
response of the circuit.

Perfectly adequate.

73's
Richard Clark, KB7QHC