On 3/7/2015 11:35 AM, Jerry Stuckle wrote:

Slope ADCs are used because they can more accurately recreate the
waveform. To make it simple - let's see the ADC is sampling at twice
the frequency being sampled, i.e. 10kHz signal and 20kHz sampling rate.
If the sample happens to be at the zero crossing point, your ADC will
show zero volts - IOW, no signal. But a slope detecting ADC will show a
fairly high positive slope on one sample and an equally negative slope
on the next sample. By integrating these, the DAC can closely recreate
the signal because it can estimate the maximum amplitude by the slopes
of the samples. No, it won't be perfect - but it will be a lot closer
than your simple ADC.


I don't enjoy discussing things with you because you have to make
everything personal. But I will explain the fallacy of your argument on
the Nyquist sampling rate concept.

You pick a sampling point for the dual slope, integrating converter that
happens to give valid results. But if you shift the phase by 90° so
that this converter sees positive values half the integrating period and
negative values for the other half, it produces all zero samples as
well. So there is really no difference in the two converters regarding
Nyquist rate sampling. It merely depends on the phasing of the sample
clock to the input signal. It also depends on how you define the
"sample point" of an integrating converter, the start, the end or the
middle of the integration period.

I will finally point out that your use of the term "slope detecting ADC"
is invalid. Google returns exactly 4 hits when this term is entered
with quotes. The name of this converter may have slope in it, but that
is because the circuit generates a slope, not because it is detecting a
slope. Please look up the circuit and use a proper name for it such as
integrating ADC or dual slope ADC. The integrating converter is not at
all sensitive to the slope of the input signal, otherwise it would not
be able to measure a DC signal which has a slope of zero.

I'm only replying so that others are not confused by your misstatements.

--

Rick

On 3/7/2015 1:33 PM, rickman wrote:
On 3/7/2015 11:35 AM, Jerry Stuckle wrote:

Slope ADCs are used because they can more accurately recreate the
waveform. To make it simple - let's see the ADC is sampling at twice
the frequency being sampled, i.e. 10kHz signal and 20kHz sampling rate.
If the sample happens to be at the zero crossing point, your ADC will
show zero volts - IOW, no signal. But a slope detecting ADC will show a
fairly high positive slope on one sample and an equally negative slope
on the next sample. By integrating these, the DAC can closely recreate
the signal because it can estimate the maximum amplitude by the slopes
of the samples. No, it won't be perfect - but it will be a lot closer
than your simple ADC.


I don't enjoy discussing things with you because you have to make
everything personal. But I will explain the fallacy of your argument on
the Nyquist sampling rate concept.

You pick a sampling point for the dual slope, integrating converter that
happens to give valid results. But if you shift the phase by 90° so
that this converter sees positive values half the integrating period and
negative values for the other half, it produces all zero samples as
well. So there is really no difference in the two converters regarding
Nyquist rate sampling. It merely depends on the phasing of the sample
clock to the input signal. It also depends on how you define the
"sample point" of an integrating converter, the start, the end or the
middle of the integration period.

I will finally point out that your use of the term "slope detecting ADC"
is invalid. Google returns exactly 4 hits when this term is entered
with quotes. The name of this converter may have slope in it, but that
is because the circuit generates a slope, not because it is detecting a
slope. Please look up the circuit and use a proper name for it such as
integrating ADC or dual slope ADC. The integrating converter is not at
all sensitive to the slope of the input signal, otherwise it would not
be able to measure a DC signal which has a slope of zero.

I'm only replying so that others are not confused by your misstatements.


As I said - I was using this as an example that even your simple mind
might understand. And I knew you would find some fault with it.

But that's why I tried to make it simple. In real life you use at least
three times the frequency; at that rate you would have sample 120
degrees apart - which always provides more accuracy than your simple
detector.

And you think Google is a valid reference? Try EE texts. Of course,
you'll have to learn a few things to understand them. But I know you'll
just dismiss my updates because you refuse to learn.

You can have the last word. I'm not trying to teach the pig to sing any
more.

--
==================
Remove the "x" from my email address
Jerry, AI0K

==================

On 3/7/2015 4:44 PM, Jerry Stuckle wrote:
On 3/7/2015 1:33 PM, rickman wrote:
On 3/7/2015 11:35 AM, Jerry Stuckle wrote:

Slope ADCs are used because they can more accurately recreate the
waveform. To make it simple - let's see the ADC is sampling at twice
the frequency being sampled, i.e. 10kHz signal and 20kHz sampling rate.
If the sample happens to be at the zero crossing point, your ADC will
show zero volts - IOW, no signal. But a slope detecting ADC will show a
fairly high positive slope on one sample and an equally negative slope
on the next sample. By integrating these, the DAC can closely recreate
the signal because it can estimate the maximum amplitude by the slopes
of the samples. No, it won't be perfect - but it will be a lot closer
than your simple ADC.


I don't enjoy discussing things with you because you have to make
everything personal. But I will explain the fallacy of your argument on
the Nyquist sampling rate concept.

You pick a sampling point for the dual slope, integrating converter that
happens to give valid results. But if you shift the phase by 90° so
that this converter sees positive values half the integrating period and
negative values for the other half, it produces all zero samples as
well. So there is really no difference in the two converters regarding
Nyquist rate sampling. It merely depends on the phasing of the sample
clock to the input signal. It also depends on how you define the
"sample point" of an integrating converter, the start, the end or the
middle of the integration period.

I will finally point out that your use of the term "slope detecting ADC"
is invalid. Google returns exactly 4 hits when this term is entered
with quotes. The name of this converter may have slope in it, but that
is because the circuit generates a slope, not because it is detecting a
slope. Please look up the circuit and use a proper name for it such as
integrating ADC or dual slope ADC. The integrating converter is not at
all sensitive to the slope of the input signal, otherwise it would not
be able to measure a DC signal which has a slope of zero.

I'm only replying so that others are not confused by your misstatements.


As I said - I was using this as an example that even your simple mind
might understand. And I knew you would find some fault with it.

But that's why I tried to make it simple. In real life you use at least
three times the frequency; at that rate you would have sample 120
degrees apart - which always provides more accuracy than your simple
detector.

And you think Google is a valid reference? Try EE texts. Of course,
you'll have to learn a few things to understand them. But I know you'll
just dismiss my updates because you refuse to learn.

You can have the last word.

The last word on what exactly? You have made several statements that
were wrong. When you try to justify your misstatements you make more
misstatements. There is nothing wrong with your example. Your
conclusion is wrong. I'm glad that we can put this to bed.

--

Rick

I will finally point out that your use of the term "slope detecting ADC"
is invalid. Google returns exactly 4 hits when this term is entered
with quotes. The name of this converter may have slope in it, but that
is because the circuit generates a slope, not because it is detecting a
slope. Please look up the circuit and use a proper name for it such as
integrating ADC or dual slope ADC. The integrating converter is not at
all sensitive to the slope of the input signal, otherwise it would not
be able to measure a DC signal which has a slope of zero.

I'm only replying so that others are not confused by your misstatements.



He is probably referring to a CVSD, otherwise known as a Delta Modulator.

Jeff

On 3/8/2015 7:35 AM, Brian Reay wrote:
Jeff wrote:

I will finally point out that your use of the term "slope detecting ADC"
is invalid. Google returns exactly 4 hits when this term is entered
with quotes. The name of this converter may have slope in it, but that
is because the circuit generates a slope, not because it is detecting a
slope. Please look up the circuit and use a proper name for it such as
integrating ADC or dual slope ADC. The integrating converter is not at
all sensitive to the slope of the input signal, otherwise it would not
be able to measure a DC signal which has a slope of zero.

I'm only replying so that others are not confused by your misstatements.



He is probably referring to a CVSD, otherwise known as a Delta Modulator.

Jeff

I don't think so. In fact, I have to say Jerry seems a bit confused in this
particular area, perhaps I have missed something.

ADC tend to have a sample and hold prior to the actual ADC convertor, thus
the value converted is that at the beginning of the sample period OR if
another approach to conversion is used, you get some kind of average over
the conversion period. (There are other techniques but those are the main
ones.)

If you think about, a S/H is required if the rate of change of the input
signal means it can change by 1/2 lsb during the conversion time for a SAR
ADC. This limits the overall BW of the ADC process. (I recall spending
some time convincing a 'seat of the pants engineer' of this when his design
wouldn't work. Even when he adopted the suggested changes he insisted his
design would have worked if the ADC was more accurate. In fact, it would
have made it worse.)


No, Brian, I am not confused. It is a form of delta modulation, but is
used in an ADC. Two samples are taken, 2 or more times the sample rate
(i.e. if the sample rate were 20us, the first sample would be taken
every 20us, with the second sample following by 10us or less). The
difference is converted to a digital value for transmission. On the
other end, the reverse happens.

Yes, the signal can change by 1/2 lsb - but that's true of any ADC.

For any sufficiently high sample rate (i.e. 3x input signal or more),
this method is never less accurate than a simple voltage detecting ADC,
and in almost every case is more accurate. However, it is a more
complex circuit (on both ends), samples a much smaller analog value and
requires more exacting components and a higher cost (which is typically
the case for any circuit improvements).

As I said - we studied them in one of my EE coursed back in the 70's. I
played with them for a while back then, but at the time the ICs were
pretty expensive for a college student.

--
==================
Remove the "x" from my email address
Jerry, AI0K

==================

No, Brian, I am not confused.

you tell the big know all .........tee hee

Jerry Stuckle wrote:
On 3/8/2015 7:35 AM, Brian Reay wrote:
Jeff wrote:

I will finally point out that your use of the term "slope detecting ADC"
is invalid. Google returns exactly 4 hits when this term is entered
with quotes. The name of this converter may have slope in it, but that
is because the circuit generates a slope, not because it is detecting a
slope. Please look up the circuit and use a proper name for it such as
integrating ADC or dual slope ADC. The integrating converter is not at
all sensitive to the slope of the input signal, otherwise it would not
be able to measure a DC signal which has a slope of zero.

I'm only replying so that others are not confused by your misstatements.



He is probably referring to a CVSD, otherwise known as a Delta Modulator.

Jeff

I don't think so. In fact, I have to say Jerry seems a bit confused in this
particular area, perhaps I have missed something.

ADC tend to have a sample and hold prior to the actual ADC convertor, thus
the value converted is that at the beginning of the sample period OR if
another approach to conversion is used, you get some kind of average over
the conversion period. (There are other techniques but those are the main
ones.)

If you think about, a S/H is required if the rate of change of the input
signal means it can change by 1/2 lsb during the conversion time for a SAR
ADC. This limits the overall BW of the ADC process. (I recall spending
some time convincing a 'seat of the pants engineer' of this when his design
wouldn't work. Even when he adopted the suggested changes he insisted his
design would have worked if the ADC was more accurate. In fact, it would
have made it worse.)


No, Brian, I am not confused. It is a form of delta modulation, but is
used in an ADC. Two samples are taken, 2 or more times the sample rate
(i.e. if the sample rate were 20us, the first sample would be taken
every 20us, with the second sample following by 10us or less). The
difference is converted to a digital value for transmission. On the
other end, the reverse happens.

Yes, the signal can change by 1/2 lsb - but that's true of any ADC.

For any sufficiently high sample rate (i.e. 3x input signal or more),
this method is never less accurate than a simple voltage detecting ADC,
and in almost every case is more accurate. However, it is a more
complex circuit (on both ends), samples a much smaller analog value and
requires more exacting components and a higher cost (which is typically
the case for any circuit improvements).

As I said - we studied them in one of my EE coursed back in the 70's. I
played with them for a while back then, but at the time the ICs were
pretty expensive for a college student.


Ok Jerry. You can, of course, find the rate of change (slope) by that
method if you know ( or assume) the signal is either only increasing or
decreasing between the samples. (A Nyquist matter).

However, the 1/2 lsb matter I mentioned is more for during the conversion,
rather that for different samples. It is particularly important for slower
ADC types, such as SAR implementations.

It may well be that we are talking at crossed purposes. I'm not making an
issue of it.

On 3/8/2015 9:03 AM, Jerry Stuckle wrote:
On 3/8/2015 7:35 AM, Brian Reay wrote:
Jeff wrote:

I will finally point out that your use of the term "slope detecting ADC"
is invalid. Google returns exactly 4 hits when this term is entered
with quotes. The name of this converter may have slope in it, but that
is because the circuit generates a slope, not because it is detecting a
slope. Please look up the circuit and use a proper name for it such as
integrating ADC or dual slope ADC. The integrating converter is not at
all sensitive to the slope of the input signal, otherwise it would not
be able to measure a DC signal which has a slope of zero.

I'm only replying so that others are not confused by your misstatements.



He is probably referring to a CVSD, otherwise known as a Delta Modulator.

Jeff

I don't think so. In fact, I have to say Jerry seems a bit confused in this
particular area, perhaps I have missed something.

ADC tend to have a sample and hold prior to the actual ADC convertor, thus
the value converted is that at the beginning of the sample period OR if
another approach to conversion is used, you get some kind of average over
the conversion period. (There are other techniques but those are the main
ones.)

If you think about, a S/H is required if the rate of change of the input
signal means it can change by 1/2 lsb during the conversion time for a SAR
ADC. This limits the overall BW of the ADC process. (I recall spending
some time convincing a 'seat of the pants engineer' of this when his design
wouldn't work. Even when he adopted the suggested changes he insisted his
design would have worked if the ADC was more accurate. In fact, it would
have made it worse.)


No, Brian, I am not confused. It is a form of delta modulation, but is
used in an ADC. Two samples are taken, 2 or more times the sample rate
(i.e. if the sample rate were 20us, the first sample would be taken
every 20us, with the second sample following by 10us or less). The
difference is converted to a digital value for transmission. On the
other end, the reverse happens.

That is not what you have been describing. Now you are saying that the
ADC samples the amplitude of the signal just as I have been saying, but
now you are adding a step in which the delta is calculated which is what
I was describing with ADPCM (although I should have used the simpler and
more like your approach DPCM).

I have never heard of using it in the way you are describing though.
Even in DPCM the samples are taken at a fixed interval and the delta is
calculated on *every* pair of adjacent samples, not just every other.
So a sample stream of x0, x1, x2, x3, etc would produce delta values of
d0, d1, d2,... not just d0, d1...

You describe two samples being taken for each data sample transmitted,
ignoring the change in signal between x1 and x2. The signal could not
be reconstructed with this data missing.


Yes, the signal can change by 1/2 lsb - but that's true of any ADC.

The sample and hold issue is a red herring and in fact, is counter
productive in a dual slope converter whose point is to average
(integrate) the signal over a period of time filtering higher frequency
content.


For any sufficiently high sample rate (i.e. 3x input signal or more),
this method is never less accurate than a simple voltage detecting ADC,
and in almost every case is more accurate. However, it is a more
complex circuit (on both ends), samples a much smaller analog value and
requires more exacting components and a higher cost (which is typically
the case for any circuit improvements).

The sampling method you describe is *not* different from a voltage
detecting ADC and therefore can't be better. All you are doing that is
different is the analog circuitry is obtaining the slope of the signal
over a short interval and is losing the slope of the signal between the
samples being ignored. Can you explain how it could be *more* accurate?

I suspect you are confusing the efficiency of the data rate with
accuracy. DPCM does provide some compression of the data rate when the
signal is over sampled as you seem to be describing. But it does
nothing to make the samples more accurate.


As I said - we studied them in one of my EE coursed back in the 70's. I
played with them for a while back then, but at the time the ICs were
pretty expensive for a college student.

Does this technique have a name? Any references?

--

Rick

On 3/8/2015 9:53 AM, Brian Reay wrote:
Jerry Stuckle wrote:
On 3/8/2015 7:35 AM, Brian Reay wrote:
Jeff wrote:

I will finally point out that your use of the term "slope detecting ADC"
is invalid. Google returns exactly 4 hits when this term is entered
with quotes. The name of this converter may have slope in it, but that
is because the circuit generates a slope, not because it is detecting a
slope. Please look up the circuit and use a proper name for it such as
integrating ADC or dual slope ADC. The integrating converter is not at
all sensitive to the slope of the input signal, otherwise it would not
be able to measure a DC signal which has a slope of zero.

I'm only replying so that others are not confused by your misstatements.



He is probably referring to a CVSD, otherwise known as a Delta Modulator.

Jeff

I don't think so. In fact, I have to say Jerry seems a bit confused in this
particular area, perhaps I have missed something.

ADC tend to have a sample and hold prior to the actual ADC convertor, thus
the value converted is that at the beginning of the sample period OR if
another approach to conversion is used, you get some kind of average over
the conversion period. (There are other techniques but those are the main
ones.)

If you think about, a S/H is required if the rate of change of the input
signal means it can change by 1/2 lsb during the conversion time for a SAR
ADC. This limits the overall BW of the ADC process. (I recall spending
some time convincing a 'seat of the pants engineer' of this when his design
wouldn't work. Even when he adopted the suggested changes he insisted his
design would have worked if the ADC was more accurate. In fact, it would
have made it worse.)


No, Brian, I am not confused. It is a form of delta modulation, but is
used in an ADC. Two samples are taken, 2 or more times the sample rate
(i.e. if the sample rate were 20us, the first sample would be taken
every 20us, with the second sample following by 10us or less). The
difference is converted to a digital value for transmission. On the
other end, the reverse happens.

Yes, the signal can change by 1/2 lsb - but that's true of any ADC.

For any sufficiently high sample rate (i.e. 3x input signal or more),
this method is never less accurate than a simple voltage detecting ADC,
and in almost every case is more accurate. However, it is a more
complex circuit (on both ends), samples a much smaller analog value and
requires more exacting components and a higher cost (which is typically
the case for any circuit improvements).

As I said - we studied them in one of my EE coursed back in the 70's. I
played with them for a while back then, but at the time the ICs were
pretty expensive for a college student.


Ok Jerry. You can, of course, find the rate of change (slope) by that
method if you know ( or assume) the signal is either only increasing or
decreasing between the samples. (A Nyquist matter).

However, the 1/2 lsb matter I mentioned is more for during the conversion,
rather that for different samples. It is particularly important for slower
ADC types, such as SAR implementations.

Can you explain your 1/2 lsb effect? What type of ADC are you referring
to? Different ADC types do require a S/H on the input for signals that
are not *highly* oversampled. For example a flash converter can mess up
and be quite a bit off if the signal is slewing during conversion. Same
with SAR converters. But I don't know of any effect where 1/2 lsb is a
threshold.

Some converters will be negatively affected by a S/H on the input. An
integrating converter can reduce the affect of higher frequency noise by
averaging the signal over a period of time reducing the requirement for
input filtering. Adding a S/H circuit will eliminate that benefit.

--

Rick

On 08/03/15 18:46, rickman wrote:
On 3/8/2015 9:53 AM, Brian Reay wrote:
Jerry Stuckle wrote:
On 3/8/2015 7:35 AM, Brian Reay wrote:
Jeff wrote:

I will finally point out that your use of the term "slope
detecting ADC"
is invalid. Google returns exactly 4 hits when this term is entered
with quotes. The name of this converter may have slope in it, but
that
is because the circuit generates a slope, not because it is
detecting a
slope. Please look up the circuit and use a proper name for it
such as
integrating ADC or dual slope ADC. The integrating converter is
not at
all sensitive to the slope of the input signal, otherwise it would
not
be able to measure a DC signal which has a slope of zero.

I'm only replying so that others are not confused by your
misstatements.



He is probably referring to a CVSD, otherwise known as a Delta
Modulator.

Jeff

I don't think so. In fact, I have to say Jerry seems a bit confused
in this
particular area, perhaps I have missed something.

ADC tend to have a sample and hold prior to the actual ADC
convertor, thus
the value converted is that at the beginning of the sample period OR if
another approach to conversion is used, you get some kind of average
over
the conversion period. (There are other techniques but those are the
main
ones.)

If you think about, a S/H is required if the rate of change of the
input
signal means it can change by 1/2 lsb during the conversion time for
a SAR
ADC. This limits the overall BW of the ADC process. (I recall spending
some time convincing a 'seat of the pants engineer' of this when his
design
wouldn't work. Even when he adopted the suggested changes he
insisted his
design would have worked if the ADC was more accurate. In fact, it
would
have made it worse.)


No, Brian, I am not confused. It is a form of delta modulation, but is
used in an ADC. Two samples are taken, 2 or more times the sample rate
(i.e. if the sample rate were 20us, the first sample would be taken
every 20us, with the second sample following by 10us or less). The
difference is converted to a digital value for transmission. On the
other end, the reverse happens.

Yes, the signal can change by 1/2 lsb - but that's true of any ADC.

For any sufficiently high sample rate (i.e. 3x input signal or more),
this method is never less accurate than a simple voltage detecting ADC,
and in almost every case is more accurate. However, it is a more
complex circuit (on both ends), samples a much smaller analog value and
requires more exacting components and a higher cost (which is typically
the case for any circuit improvements).

As I said - we studied them in one of my EE coursed back in the 70's. I
played with them for a while back then, but at the time the ICs were
pretty expensive for a college student.


Ok Jerry. You can, of course, find the rate of change (slope) by that
method if you know ( or assume) the signal is either only increasing or
decreasing between the samples. (A Nyquist matter).

However, the 1/2 lsb matter I mentioned is more for during the
conversion,
rather that for different samples. It is particularly important for
slower
ADC types, such as SAR implementations.

Can you explain your 1/2 lsb effect? What type of ADC are you referring
to? Different ADC types do require a S/H on the input for signals that
are not *highly* oversampled. For example a flash converter can mess up
and be quite a bit off if the signal is slewing during conversion. Same
with SAR converters. But I don't know of any effect where 1/2 lsb is a
threshold.

What threshold would you expect? As I recall, 1/2 lsb is the limit to
ensure that the conversion would be the 'same' over the conversion time.