On 3/8/2015 4:37 PM, Jerry Stuckle wrote:
On 3/8/2015 2:39 PM, rickman wrote:
On 3/8/2015 9:03 AM, Jerry Stuckle wrote:
On 3/8/2015 7:35 AM, Brian Reay wrote:
Jeff wrote:

I will finally point out that your use of the term "slope detecting
ADC"
is invalid. Google returns exactly 4 hits when this term is entered
with quotes. The name of this converter may have slope in it, but
that
is because the circuit generates a slope, not because it is
detecting a
slope. Please look up the circuit and use a proper name for it
such as
integrating ADC or dual slope ADC. The integrating converter is
not at
all sensitive to the slope of the input signal, otherwise it would not
be able to measure a DC signal which has a slope of zero.

I'm only replying so that others are not confused by your
misstatements.



He is probably referring to a CVSD, otherwise known as a Delta
Modulator.

Jeff

I don't think so. In fact, I have to say Jerry seems a bit confused
in this
particular area, perhaps I have missed something.

ADC tend to have a sample and hold prior to the actual ADC convertor,
thus
the value converted is that at the beginning of the sample period OR if
another approach to conversion is used, you get some kind of average
over
the conversion period. (There are other techniques but those are the
main
ones.)

If you think about, a S/H is required if the rate of change of the input
signal means it can change by 1/2 lsb during the conversion time for
a SAR
ADC. This limits the overall BW of the ADC process. (I recall spending
some time convincing a 'seat of the pants engineer' of this when his
design
wouldn't work. Even when he adopted the suggested changes he insisted
his
design would have worked if the ADC was more accurate. In fact, it would
have made it worse.)


No, Brian, I am not confused. It is a form of delta modulation, but is
used in an ADC. Two samples are taken, 2 or more times the sample rate
(i.e. if the sample rate were 20us, the first sample would be taken
every 20us, with the second sample following by 10us or less). The
difference is converted to a digital value for transmission. On the
other end, the reverse happens.

That is not what you have been describing. Now you are saying that the
ADC samples the amplitude of the signal just as I have been saying, but
now you are adding a step in which the delta is calculated which is what
I was describing with ADPCM (although I should have used the simpler and
more like your approach DPCM).


It is EXACTLY what I've been describing, but you're too stoopid to
understand it. But as usual, rather than trying to learn, you argue and
prove your stoopidity.

I have never heard of using it in the way you are describing though.
Even in DPCM the samples are taken at a fixed interval and the delta is
calculated on *every* pair of adjacent samples, not just every other. So
a sample stream of x0, x1, x2, x3, etc would produce delta values of d0,
d1, d2,... not just d0, d1...


That's OK. Those types of ADC's haven't heard of you, either, so I
guess you don't exist.

You describe two samples being taken for each data sample transmitted,
ignoring the change in signal between x1 and x2. The signal could not
be reconstructed with this data missing.


Once again you are proving you have no idea.


Yes, the signal can change by 1/2 lsb - but that's true of any ADC.

The sample and hold issue is a red herring and in fact, is counter
productive in a dual slope converter whose point is to average
(integrate) the signal over a period of time filtering higher frequency
content.


Which has nothing to do with what I'm discussing. But you have to
argue, anyway.


For any sufficiently high sample rate (i.e. 3x input signal or more),
this method is never less accurate than a simple voltage detecting ADC,
and in almost every case is more accurate. However, it is a more
complex circuit (on both ends), samples a much smaller analog value and
requires more exacting components and a higher cost (which is typically
the case for any circuit improvements).

The sampling method you describe is *not* different from a voltage
detecting ADC and therefore can't be better. All you are doing that is
different is the analog circuitry is obtaining the slope of the signal
over a short interval and is losing the slope of the signal between the
samples being ignored. Can you explain how it could be *more* accurate?


Once again you show you have no idea what I'm talking about, yet you
have to prove your stoopidity by arguing, anyway.

I suspect you are confusing the efficiency of the data rate with
accuracy. DPCM does provide some compression of the data rate when the
signal is over sampled as you seem to be describing. But it does
nothing to make the samples more accurate.


Once again you show you have no idea what I'm talking about, yet you
have to prove your stoopidity by arguing, anyway.


As I said - we studied them in one of my EE coursed back in the 70's. I
played with them for a while back then, but at the time the ICs were
pretty expensive for a college student.

Does this technique have a name? Any references?


Go to school, get an EE degree, then maybe we can talk about it
intelligently. I'm not wasting my time trying to teach the pig to sing.

Maybe - IF you were ever more interested in learning than arguing, I
would be more interested in discussing it with you. But you have
repeatedly proven that is not the case, so I'm not.

Ok Jerry. I'm not going to argue with you. I asked you for the name of
this ADC technique and you can't come up with one. In this post *every*
single one of your replies is ad hominem rather than discussing the
issue. Clearly you have no basis for what you are saying. So there is
no point in trying to get you to explain any further.

--

Rick