On 12/29/2015 8:17 PM, Jeff Liebermann wrote:
On Tue, 29 Dec 2015 22:14:45 -0000, "gareth"
wrote:

What is interesting is the simplicity of the approach (ignoring the hidden
cost of the ubiquitous PC), but it ignores the multiple harmonics that
come out of DDS chips.

One of the nice things about DDS is the lack of harmonics and
distortion. Given sufficient bits, you won't see much in the way of
harmonics. If there are are any harmonics, it's treated as
"distortion" which in this case means unwanted junk signals. See the
section on "dynamic performance".
http://www.embedded.com/design/configurable-systems/4025078/Understanding-analog-to-digital-converter-specifications
SNR(dB) = (6.02*N) + 1.76 where N = number of bits
So, if you have a 8 bit DDS, all the junk will be down:
(6.02*8)+1.76 = 50 dB
I think that's sufficient for most VNA applications. Of course, you
can introduce other forms of distorition (jitter, non-linearity,
clipping, symmetry, etc) errors in stages after the DDS.

The issue with noise from a DDS is that all noise is not the same. A
DDS is used to produce a sine wave, preferably of a single frequency. A
typical DDS has a phase accumulator word of some number of bits which
establishes the accuracy of the frequency being produced. Then some or
all of those bits are used to produce digital samples of the sine wave.
The quantization noise of the sample produces noise which is fairly
evenly spread across the spectrum, but related more to the clock rate
than the carrier frequency. The quantization noise from the phase word
produces noise which has significant content very close to the carrier.
This noise can not be easily filtered and so is of great concern. The
fewer phase word bits used (called phase truncation) to produce the sine
values the greater the close in noise.

For the most part you seem to be describing noise created by an ADC or
DAC which is dependent on the number of bits in the sine wave sample.

--

Rick