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Old February 28th 13, 11:40 PM posted to sci.electronics.design,rec.radio.amateur.antenna,rec.radio.amateur.homebrew
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First recorded activity by RadioBanter: Sep 2006
Posts: 27
Default Antenna Simulation in LTspice

"rickman" wrote in message
...
A higher frequency would imply a smaller L and/or C. How do you combine
them to produce that? Consider the two caps to be in series???


Sure. If you bring the 10p over to the primary, it looks like 10p * (30m
/ 5u), or whatever the ratio was (I don't have it in front of me now), in
parallel with the primary. (I misspoke earlier, you can safely ignore Ls,
because k = 1. There's no flux which is not common to both windings.)

Inductors effectively in parallel also increase the expected resonant
frequency. If you have this,

.. L1
.. +-----UUU--+------+------+
.. | + | | |
.. ( Vsrc ) === C R 3 L2
.. | - | 3
.. | | | |
.. +----------+------+------+
.. _|_ GND

You might expect the resonant frequency is L2 + C, but it's actually (L1
|| L2) = Leq. If L1 is not substantially larger than L2, the resonant
frequency will be pulled higher.

Incidentally, don't forget to include loss components. I didn't see any
explict R on the schematic. I didn't check if you set the LTSpice default
parasitic ESR (cap), or DCR or EPR (coil) on the components. Besides
parasitic losses, your signal is going *somewhere*, and that "where"
consumes power!

The actual transmitter is most certainly not a perfect current source
inductor, nor is the receiver lossless. This simulation has no expression
for radiation in any direction that's not directly between the two
antennas: if all the power transmitted by the current source is reflected
back, even though it's through a 0.1% coupling coefficient, it has to go
somewhere. If it's coming back out the antenna, and it's not being burned
in the "transformer", it's coming back into the transmitter. This is at
odds with reality, where a 100% reflective antenna doesn't magically smoke
a distant transmitter, it simply reflects 99.9% back into space. The
transmitter hardly knows.

In this example, if you set R very large, you'll see ever more voltage on
the output, and ever more current draw from Vsrc. You can mitigate this
by increasing L1 still further, but the point is, if the source and load
(R) aren't matched in some fashion, the power will reflect back to the
transmitter and cause problems (in this case, power reflected back
in-phase causes excessive current draw; in the CCS case, reflected power
in-phase causes minimal voltage generation and little power transmission).

Power is always coming and going somewhere, and if you happen to forget
this fact, it'll reflect back and zap you in the butt sooner or later!

Tim

--
Deep Friar: a very philosophical monk.
Website: http://seventransistorlabs.com


 
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