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Old February 20th 04, 09:53 PM
Avery Fineman
 
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In article , Roy Lewallen
writes:

Avery Fineman wrote:
. . .
Making practical, reproducible active multipliers in the home shop
is, practically, a trial-and-error process involving playing with cut-
off bias of the active device input, energy and harmonic content of
the source, and Q of the multiplier's output stage. In the past I've
made tripling-in-the-plate pentode crystal oscillators using
fundamental frequency quartz but those were highly dependent on
getting the highest impedance tuned plate circuit and needed
scope viewing to check output waveforms. Not very reproducible.
There's no "easy" way to do it that will "work every time" despite
the claims of many. :-)
. . .


While that's certainly true of multipliers in general, I've certainly
found it very easy to make repeatable doublers with a two transistor
push-push stage. Driving it with about zero bias and a large enough
signal to get it to conduct on at least a good fraction of each cycle
gives plenty of harmonic energy. A collector circuit with decent Q will
take care of most higher harmonics, although a simple filter following
the stage is usually adequate for more demanding applications. The
fundamental can be nulled out reasonably well with a pot between
emitters with a grounded center tap. I'd think a push-pull tripler would
be nearly as easy, but I haven't had occasion to make one.


Okay. I can't agree that they are "easy" after having enough
occasions to make several. :-)

Your mileage, of course, varies.

Several simple diode and transistor multipliers are described in Chapter
5 of _Experimental Methods in RF Design_, which I heartily recommend for
the homebrewer and experimenter.


A diode doubler using a toroid transformer, pair of diodes and a tuned
circuit in the output works fine right off the paper pad and slide-rule (or
calculator) numbers. Typically the source is a distorted sinewave
from either another multiplier or an oscillator. Rocket science it ain't.

BREADBOARD. A most handy part of the bench tools. Recommended
first. Especially for those purist hobbyists who think that digital
circuits
aren't "real radio." :-)

Playing with bias on a transistor multiplier stage is fine for optimizing a
multiplication but all it is is play when there's nothing to compare one
bias setting with another as to power output at the desired multiple.
A spectrum analyzer isn't an absolute need, by the way, there's other
ways to measure the harmonic content. Is that in "Experimental
Methods..." published by the ARRL? [I'm pushing work-on-the-bench,
not books, pardon my attitude that has resulted from years of having
to produce hardware results, not paper reports]

Len Anderson
retired (from regular hours) electronic engineering person
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Old February 20th 04, 09:46 AM
Roy Lewallen
 
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Avery Fineman wrote:
. . .
Making practical, reproducible active multipliers in the home shop
is, practically, a trial-and-error process involving playing with cut-
off bias of the active device input, energy and harmonic content of
the source, and Q of the multiplier's output stage. In the past I've
made tripling-in-the-plate pentode crystal oscillators using
fundamental frequency quartz but those were highly dependent on
getting the highest impedance tuned plate circuit and needed
scope viewing to check output waveforms. Not very reproducible.
There's no "easy" way to do it that will "work every time" despite
the claims of many. :-)
. . .


While that's certainly true of multipliers in general, I've certainly
found it very easy to make repeatable doublers with a two transistor
push-push stage. Driving it with about zero bias and a large enough
signal to get it to conduct on at least a good fraction of each cycle
gives plenty of harmonic energy. A collector circuit with decent Q will
take care of most higher harmonics, although a simple filter following
the stage is usually adequate for more demanding applications. The
fundamental can be nulled out reasonably well with a pot between
emitters with a grounded center tap. I'd think a push-pull tripler would
be nearly as easy, but I haven't had occasion to make one.

Several simple diode and transistor multipliers are described in Chapter
5 of _Experimental Methods in RF Design_, which I heartily recommend for
the homebrewer and experimenter.

Roy Lewallen, W7EL

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Old February 16th 04, 10:05 PM
Stephen Quigg
 
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In article , Paul Burridge wrote:
What's the maximum multiplication factor it's practical and sensible
to attempt to achieve in one single stage of multiplication? (Say from
a 7Mhz square wave source with 5nS rise/fall times.)


Not radio, but interesting nevertheless. The older Hewlett-Packard cesium
clocks, ie 5060/61/62 vintage multiplied a crystal oscillator up to 90 MHz in
several stages. This fed into a step-recovery diode that sits in a cavity, and
has 12.631... MHz applied to the SRD bias. The cavity selects the ***102nd***
harmonic ie 9180 MHz, and there are also sidebands at +/- 12.631.. MHz This is
then fed into a hi-Q cavity tuned to the upper sideband ie 9192.631... MHz
which is the desired cesium transition frequency.

Adjusting the whole thing was a bit fiddly, and there were also some
factory-set adjustments that you NEVER TOUCHED unless you had plenty of time
and a squillion dollars worth of test gear. This was all a 1960's design and
was a bit of a stretch. The newer (5071) clocks do things QUITE differently.

Steve Quigg
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Old February 17th 04, 11:02 AM
GPG
 
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Wadley loop recievers had to generate 33rd+ harmonic
Not quite OT but a great (old) idea
http://www.siliconchip.com.au/cms/A_30512/article.html
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Old February 17th 04, 11:52 AM
BFoelsch
 
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I had a Yaesu FRG-7 receiver that used this lovely Wadley loop. If you
subscribe to the theory that every beep and bloop you hear as you tune
across the dial is a station, that is the receiver for you!

However, if you understand spurs and birdies, a different picture emerges.
Lots of noise, too!


"GPG" wrote in message
om...
Wadley loop recievers had to generate 33rd+ harmonic
Not quite OT but a great (old) idea
http://www.siliconchip.com.au/cms/A_30512/article.html





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Old February 17th 04, 11:52 AM
BFoelsch
 
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I had a Yaesu FRG-7 receiver that used this lovely Wadley loop. If you
subscribe to the theory that every beep and bloop you hear as you tune
across the dial is a station, that is the receiver for you!

However, if you understand spurs and birdies, a different picture emerges.
Lots of noise, too!


"GPG" wrote in message
om...
Wadley loop recievers had to generate 33rd+ harmonic
Not quite OT but a great (old) idea
http://www.siliconchip.com.au/cms/A_30512/article.html



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Old February 17th 04, 11:02 AM
GPG
 
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Wadley loop recievers had to generate 33rd+ harmonic
Not quite OT but a great (old) idea
http://www.siliconchip.com.au/cms/A_30512/article.html
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Old February 16th 04, 07:45 PM
Avery Fineman
 
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In article , Paul Burridge
writes:

What's the maximum multiplication factor it's practical and sensible
to attempt to achieve in one single stage of multiplication? (Say from
a 7Mhz square wave source with 5nS rise/fall times.)


Paul, past state of the hardware art (past 60 years) indicates that
triplers are the practical maximum. Quintuplers have been done
but those are rare in described applications.

In 1955 I had hands-on experience with a septupler (7 x multiplier)
using a 2C39 and a cavity-tuned plate circuit at 1.8 GHz. That was
in a General Electric microwave radio relay terminal designed about
1950. Of nine terminals, two had to "QSY" to new crystal-controlled
microwave center frequencies for second-level contingency operation.
Difficult and fussy to do but was do-able...the crystal was also 7th
overtone in a vacuum tube oscillator but was followed by a buffer
stage feeding a tripler, another buffer, then the septupler which fed
another 2C39 as the pulse-modulated final for 12 W peak output at
1.8 GHz. [from memory and 35mm slides...big GE manual went to
recycle a long time ago] That's the only septupler application that
I am aware of...no doubt there are others, somewhere.

General Electric must have had some division/work-group with lots
of work in old frequency control methods. A local NTSC color sub-
carrier generator-regenerator made by GE had extensive use of
"locked oscillators" for frequency multiplication and division, but
mostly at frequencies lower than 7 MHz. Haven't come across any
practical hardware on locked oscillators except for two mentions in
older journals, trade papers. One of those used transistors as
active devices.

Doublers and quadruplers have been made using both diodes and
tube-or-transistor active devices. That's relatively easy with non-
square waveforms (distorted sinewaves); square waves have high
odd harmonic energy, low even harmonic energy.

Making practical, reproducible active multipliers in the home shop
is, practically, a trial-and-error process involving playing with cut-
off bias of the active device input, energy and harmonic content of
the source, and Q of the multiplier's output stage. In the past I've
made tripling-in-the-plate pentode crystal oscillators using
fundamental frequency quartz but those were highly dependent on
getting the highest impedance tuned plate circuit and needed
scope viewing to check output waveforms. Not very reproducible.
There's no "easy" way to do it that will "work every time" despite
the claims of many. :-)

Digital division IS straightforward up to about 1 GHz based on
such technology over the last 3 decades. That's why PLLs came
to prominence in frequency control techniques up to UHF.

Len Anderson
retired (from regular hours) electronic engineer person
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Old February 16th 04, 10:05 PM
Stephen Quigg
 
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In article , Paul Burridge wrote:
What's the maximum multiplication factor it's practical and sensible
to attempt to achieve in one single stage of multiplication? (Say from
a 7Mhz square wave source with 5nS rise/fall times.)


Not radio, but interesting nevertheless. The older Hewlett-Packard cesium
clocks, ie 5060/61/62 vintage multiplied a crystal oscillator up to 90 MHz in
several stages. This fed into a step-recovery diode that sits in a cavity, and
has 12.631... MHz applied to the SRD bias. The cavity selects the ***102nd***
harmonic ie 9180 MHz, and there are also sidebands at +/- 12.631.. MHz This is
then fed into a hi-Q cavity tuned to the upper sideband ie 9192.631... MHz
which is the desired cesium transition frequency.

Adjusting the whole thing was a bit fiddly, and there were also some
factory-set adjustments that you NEVER TOUCHED unless you had plenty of time
and a squillion dollars worth of test gear. This was all a 1960's design and
was a bit of a stretch. The newer (5071) clocks do things QUITE differently.

Steve Quigg
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Old February 17th 04, 11:37 PM
Geoff
 
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Tell me how you will use that and I will tell you the answer.

"Paul Burridge" wrote in message
...
What's the maximum multiplication factor it's practical and sensible
to attempt to achieve in one single stage of multiplication? (Say from
a 7Mhz square wave source with 5nS rise/fall times.)
--

The BBC: Licensed at public expense to spread lies.





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