Hi Tom,
my TCXO is GTXO-531 GOLLEDGE-UK product.

The parameters:
Clipped Sine Wave 1.0V p-p

Test Load 10k//10pF

Phase noise ):
-135dbc/Hz max

To this point I have 2 possible ways:

1) TCXO+HelicalFilter480Mhz+BFR96 Buffer+HelicalFilter480Mhz

2) TCXO+Ampli-Multiplier x3(120 Mhz)+Ampli-Multiplier x4(480Mhz)+Helical
Filter480Mhz

Also here, perhaps it is the case to make some test.
But, to the first impact, what you tasks?

73's de IK6GQC Rocco

"K7ITM" ha scritto nel messaggio
ups.com...
Hi Rocco,

I would use the multiplication. Within the loop bandwidth of the PLL,
the phase noise will be determined by the crystal oscillator used as a
reference PLUS the noise contributed by the PLL chip itself (the phase
comparator and loop filter/amplifier), and outside the loop bandwidth,
it will be determined by the VCO used in the PLL. The important
thing, whether you use a PLL or multiplication, is to start with a
reference which has low phase noise. In fact, your TCXO may have good
phase noise...I don't know...I only know that some I've tested have not
been as clean as I'd like. But I'm also setting pretty high standards
for what I'm doing.

If I were in your shoes, I would build the multiplier system just as
you first described, and use the TCXO you have, and if it proves to be
too noisy (phase noise), then look for a better oscillator. If you can
make even a crude measurement of the oscillator's phase noise before
you start, that would be good, too, just to know where you are
starting. My comment in my earlier posting was just to make you aware
to look at phase noise, not to change the basic way you are going about
it.

Cheers,
Tom