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On 3/8/2015 7:35 AM, Brian Reay wrote:
Jeff wrote: I will finally point out that your use of the term "slope detecting ADC" is invalid. Google returns exactly 4 hits when this term is entered with quotes. The name of this converter may have slope in it, but that is because the circuit generates a slope, not because it is detecting a slope. Please look up the circuit and use a proper name for it such as integrating ADC or dual slope ADC. The integrating converter is not at all sensitive to the slope of the input signal, otherwise it would not be able to measure a DC signal which has a slope of zero. I'm only replying so that others are not confused by your misstatements. He is probably referring to a CVSD, otherwise known as a Delta Modulator. Jeff I don't think so. In fact, I have to say Jerry seems a bit confused in this particular area, perhaps I have missed something. ADC tend to have a sample and hold prior to the actual ADC convertor, thus the value converted is that at the beginning of the sample period OR if another approach to conversion is used, you get some kind of average over the conversion period. (There are other techniques but those are the main ones.) If you think about, a S/H is required if the rate of change of the input signal means it can change by 1/2 lsb during the conversion time for a SAR ADC. This limits the overall BW of the ADC process. (I recall spending some time convincing a 'seat of the pants engineer' of this when his design wouldn't work. Even when he adopted the suggested changes he insisted his design would have worked if the ADC was more accurate. In fact, it would have made it worse.) No, Brian, I am not confused. It is a form of delta modulation, but is used in an ADC. Two samples are taken, 2 or more times the sample rate (i.e. if the sample rate were 20us, the first sample would be taken every 20us, with the second sample following by 10us or less). The difference is converted to a digital value for transmission. On the other end, the reverse happens. Yes, the signal can change by 1/2 lsb - but that's true of any ADC. For any sufficiently high sample rate (i.e. 3x input signal or more), this method is never less accurate than a simple voltage detecting ADC, and in almost every case is more accurate. However, it is a more complex circuit (on both ends), samples a much smaller analog value and requires more exacting components and a higher cost (which is typically the case for any circuit improvements). As I said - we studied them in one of my EE coursed back in the 70's. I played with them for a while back then, but at the time the ICs were pretty expensive for a college student. -- ================== Remove the "x" from my email address Jerry, AI0K ================== |
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