rickman wrote:
On 11/22/2012 4:07 AM, Rob wrote:
wrote:
Do digital receivers get discussed here much? I am working on a
receiver for the WWVB signal at 60 kHz and am looking at a very low
power all digital design in an FPGA. Of course some aspects are still
analog such as the antenna. I have been reading about loop antennas for
low frequency work. I don't plan on having an analog amplifier unless
it is needed. I may be able to sample the RF signal directly and use
processing to boost the signal out of the noise.

Has anyone done anything like this? Right now I am looking at how to
synchronize the sample rate with the carrier so that I can accumulate
the signal in a coherent manner.

Any pointers on where I could find more info?

Search for "SDR". Software defined radio. It is hot these days.

You will need the mathematical background to understand and create
designs like this. Of course there are many articles explaining
the digital signal processing, and how to build a program that does
what you want.

At 60 kHz it should be easy. People do this at 30 MHz.

There it is! I had to restart my newsreader to see this message.

Yes, the term SDR is very broad. I was thinking there might be some
folks here doing work in this area.

Yes, the math is rather intense. While the math is always essential,
there are often times when a good seat of the pants feel for the job is
important too. DSP is just the digital version of analog signal
processing. It is the "signal processing" part that is important.

True. I thought I should just mention that because many people are
able to construct such a receiver using analog techniques and discrete
parts, using standard "building blocks" they are familiar with like
an LC bandfilter, an amplifier, an AM detector etc, but would find
themselves in unknown charters when they would have to write down the
mathematical equivalent of what they constructed in hardware.
When you can do that, and are familiar with the usual conversions between
time domain and frequency domain, it should be possible to write the
code (and/or construct it from existing modules).

I have been able to write some DSP code that way, even on a dedicated
DSP in asm (which has the extra complication that you need to learn the
instruction set, that looks quite different from a normal CPU), and
it was fun.

However, before that DSP experiment I sometimes wrote code that looked
for zerocrossings and timed the duration between them, and tries to
decode data from that, and that is the wrong approach when you want
good performance.

On 11/22/2012 1:07 PM, Rob wrote:
I have been able to write some DSP code that way, even on a dedicated
DSP in asm (which has the extra complication that you need to learn the
instruction set, that looks quite different from a normal CPU), and
it was fun.

DSP doesn't have to be code. In this case it will be hardware in an
FPGA. So the calculations will all be done in dedicated hardware. I
don't plan on doing multiplies, but that might happen. These chips
don't have dedicated multiplier. I've done multiplier designs with the
shift and add algorithm, not so hard.


However, before that DSP experiment I sometimes wrote code that looked
for zerocrossings and timed the duration between them, and tries to
decode data from that, and that is the wrong approach when you want
good performance.

Actually I did a commercial design that way for demodulating a time code
signal. It only needed to measure amplitude to get the data, but had to
sync to the carrier for "precise" timing. Looking for the zero
crossings was a very effective method with an 8 kHz sample rate on a 1
kHz carrier that had a very high SNR.

Rick