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Old February 9th 14, 05:44 AM posted to rec.radio.amateur.homebrew
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First recorded activity by RadioBanter: Feb 2010
Posts: 27
Default Front-end design for a DDS transceiver

Hi all,

I'm in the midst of designing a homebrew transceiver. Some time back I
bought a couple of DDS kits with the intention of using them for this
purpose. I also have some ADE-1+ double-balanced mixers.

Now the DDS kit I'm using[1] uses a Analog Devices AD9851 which is fed
into a couple of high-speed D-flipflops, producing I and Q signals
between 0 and 30MHz.

Sounds perfect for HF. I also have a Raspberry Pi PC, and a STM32F103RE
microcontroller; which has 3 12-bit ADCs and 2 12-bit DACs (apparently
good to 1Msps).

I read somewhere that someone had ported a FFT transform library to the
GPU of the Raspberry Pi, so I thought that I could use the STM32's ADCs
and DACs interfaced to the Raspberry Pi using I²S, then use the Pi's GPU
as a poor man's DSP to de-modulate the signal to baseband.

My plan is something along these lines:

Receive:

ANT - [BPF] - [AMP] - [Mixer (LO=AD9851)]- ...
... [LPF] - [STM32 MCU] - [RPi]

I've omitted the quadrature part here; basically everything between the
front-end buffer amplifier and the STM32 would be duplicated.

The LPF would be set for the sample rate of the STM32; somewhere in the
realm of 250-500kHz low-pass. It'll depend on what I can achieve.

The sticking point right now is in the handling of the output from the
LO. The I/Q DDS kit produces a square wave output. Initially this
concerned me a bit, as from my university days I understand square waves
to be rather harmonically rich.

A bit of reading up, apparently these things thrive on such LO signals,
they need to be driven to saturation. This still leaves me with a
concern. Suppose I had a 1MHz LO.

In reality, 1MHz square wave is in practice, a 1MHz sine + a weak 2MHz
sine + a stronger 3MHz sine … ad-nauseum. There's all the harmonics to
contend with. What effect does this have on a mixer?

Does it see the harmonics and if so, how do people deal with them? I'm
guessing it does and that the answer is a liberal set of overlapping BPF
filters that can be switched in to cover the range of the DDS VFO. In
my case, a selection of filters that cover 0-30MHz.

Something like this I guess:
Filt Start Stop BW Min Max
0 0.00 250,000.00 250,000.00 0.00 240,000.00
1 240,000.00 470,000.00 230,000.00 240,000.00 420,000.00
2 420,000.00 830,000.00 410,000.00 420,000.00 780,000.00
3 780,000.00 1,550,000.00 770,000.00 780,000.00 1,500,000.00
4 1,500,000.00 2,990,000.00 1,490,000.00 1,500,000.00 2,940,000.00
5 2,940,000.00 5,870,000.00 2,930,000.00 2,940,000.00 5,820,000.00
6 5,820,000.00 11,630,000.00 5,810,000.00 5,820,000.00 11,580,000.00
7 11,580,000.00 23,150,000.00 11,570,000.00 11,580,000.00 23,100,000.00
8 23,100,000.00 46,190,000.00 23,090,000.00 23,100,000.00 30,000,000.00


I'd have five GPIOs select them somehow from the STM32. How do people
go about switching between them? I'd imagine relays; in fact the
FT-897D I have, as I tune up I hear relays clicking as I pass in and out
of each band. So I'm guessing this is one of many solutions. I'm just
concerned about how many one might need.

Thanks in advance.
Regards,
Stuart Longland

1.
http://www.minikits.com.au/electroni...-AD9851-IQ-DDS
  #2   Report Post  
Old February 10th 14, 11:13 AM posted to rec.radio.amateur.homebrew
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First recorded activity by RadioBanter: Sep 2012
Posts: 1,382
Default Front-end design for a DDS transceiver

"Stuart Longland VK4MSL" wrote in message
...

Not quite the answer you were looking for, but examine
the ideas in this offering from VU land, especially
the mixer.

http://www.phonestack.com/farhan/minima.html



  #3   Report Post  
Old February 11th 14, 01:38 AM posted to rec.radio.amateur.homebrew
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First recorded activity by RadioBanter: Jul 2013
Posts: 10
Default Front-end design for a DDS transceiver

On Sun, 09 Feb 2014 15:44:26 +1000, Stuart Longland VK4MSL wrote:

Hi all,

I'm in the midst of designing a homebrew transceiver. Some time back I
bought a couple of DDS kits with the intention of using them for this
purpose. I also have some ADE-1+ double-balanced mixers.

Now the DDS kit I'm using[1] uses a Analog Devices AD9851 which is fed
into a couple of high-speed D-flipflops, producing I and Q signals
between 0 and 30MHz.

Sounds perfect for HF. I also have a Raspberry Pi PC, and a STM32F103RE
microcontroller; which has 3 12-bit ADCs and 2 12-bit DACs (apparently
good to 1Msps).

I read somewhere that someone had ported a FFT transform library to the
GPU of the Raspberry Pi, so I thought that I could use the STM32's ADCs
and DACs interfaced to the Raspberry Pi using I²S, then use the Pi's GPU
as a poor man's DSP to de-modulate the signal to baseband.

My plan is something along these lines:

Receive:

ANT - [BPF] - [AMP] - [Mixer (LO=AD9851)]- ...
... [LPF] - [STM32 MCU] - [RPi]

I've omitted the quadrature part here; basically everything between the
front-end buffer amplifier and the STM32 would be duplicated.

The LPF would be set for the sample rate of the STM32; somewhere in the
realm of 250-500kHz low-pass. It'll depend on what I can achieve.


You're probably being ambitious with what can be done. While the ADC can
sample that fast, the processor -- even running at 48MHz or whatever it
can do -- may not be able to keep up.

The sticking point right now is in the handling of the output from the
LO. The I/Q DDS kit produces a square wave output. Initially this
concerned me a bit, as from my university days I understand square waves
to be rather harmonically rich.

A bit of reading up, apparently these things thrive on such LO signals,
they need to be driven to saturation. This still leaves me with a
concern. Suppose I had a 1MHz LO.

In reality, 1MHz square wave is in practice, a 1MHz sine + a weak 2MHz
sine + a stronger 3MHz sine … ad-nauseum. There's all the harmonics to
contend with. What effect does this have on a mixer?


Diode ring mixers basically end up acting like switches anyway. Sending
them square waves just means that the transition regions are smaller,
which should do no harm and may lead to less phase noise.

Does it see the harmonics and if so, how do people deal with them?


Yes it 'sees' the harmonics. Basically -- even if you're exciting it
with a sine wave -- you should plan on the mixer's input being mixed
against a square wave.

In fact, some microwave equipment used to take advantage of this, to keep
the LO frequency down. It may still -- it's been a long time since I've
really paid attention to radio technology.

I'm
guessing it does and that the answer is a liberal set of overlapping BPF
filters that can be switched in to cover the range of the DDS VFO. In
my case, a selection of filters that cover 0-30MHz.


Yup.

This is why modern radios (or at least radios as of 25 years ago, when I
was last paying attention) had a first IF above the band of interest --
it put the most significant frequencies that could be spuriously mixed
well above the desired reception frequency.

Something like this I guess:
Filt Start Stop BW Min Max
0 0.00 250,000.00 250,000.00 0.00
240,000.00 1 240,000.00 470,000.00 230,000.00
240,000.00 420,000.00 2 420,000.00 830,000.00
410,000.00 420,000.00 780,000.00 3 780,000.00
1,550,000.00 770,000.00 780,000.00 1,500,000.00 4
1,500,000.00 2,990,000.00 1,490,000.00 1,500,000.00
2,940,000.00 5 2,940,000.00 5,870,000.00 2,930,000.00
2,940,000.00 5,820,000.00 6 5,820,000.00 11,630,000.00
5,810,000.00 5,820,000.00 11,580,000.00 7 11,580,000.00
23,150,000.00 11,570,000.00 11,580,000.00 23,100,000.00 8
23,100,000.00 46,190,000.00 23,090,000.00 23,100,000.00
30,000,000.00


I'd have five GPIOs select them somehow from the STM32.


Why not 12? Surely you have lots of spare pins to play with.

How do people
go about switching between them? I'd imagine relays; in fact the
FT-897D I have, as I tune up I hear relays clicking as I pass in and out
of each band. So I'm guessing this is one of many solutions. I'm just
concerned about how many one might need.

Thanks in advance.
Regards,
Stuart Longland

1.
http://www.minikits.com.au/electroni...zer/basic-dds/

Basic-AD9851-IQ-DDS





--

Tim Wescott
Wescott Design Services
http://www.wescottdesign.com

  #4   Report Post  
Old February 11th 14, 11:25 AM posted to rec.radio.amateur.homebrew
external usenet poster
 
First recorded activity by RadioBanter: Feb 2010
Posts: 27
Default Front-end design for a DDS transceiver

Hi Gareth,
On 10/02/14 21:13, gareth wrote:
"Stuart Longland VK4MSL" wrote in message
...

Not quite the answer you were looking for, but examine
the ideas in this offering from VU land, especially
the mixer.

http://www.phonestack.com/farhan/minima.html


I'll have a closer look at that. I like the minimalist design of that
one, and it's also mainly common-garden variety transistors and parts in it.

Cheers.
  #5   Report Post  
Old February 11th 14, 11:52 AM posted to rec.radio.amateur.homebrew
external usenet poster
 
First recorded activity by RadioBanter: Feb 2010
Posts: 27
Default Front-end design for a DDS transceiver

Hi Tim,
On 11/02/14 11:38, Tim Wescott wrote:
On Sun, 09 Feb 2014 15:44:26 +1000, Stuart Longland VK4MSL wrote:
My plan is something along these lines:

Receive:

ANT - [BPF] - [AMP] - [Mixer (LO=AD9851)]- ...
... [LPF] - [STM32 MCU] - [RPi]

I've omitted the quadrature part here; basically everything between the
front-end buffer amplifier and the STM32 would be duplicated.

The LPF would be set for the sample rate of the STM32; somewhere in the
realm of 250-500kHz low-pass. It'll depend on what I can achieve.


You're probably being ambitious with what can be done. While the ADC can
sample that fast, the processor -- even running at 48MHz or whatever it
can do -- may not be able to keep up.


Well, the STM32F103 runs at 72MHz, and if I were doing actual DSP with
it, it'd be light-on. The idea right now is just to have it capture the
waveform and shovel it down the I²S link as fast as it can.

So the interrupt routine would be copying from the ADC's output register
to one of two buffers then setting a flag. The plan is that the ADC
ISRs will be at most maybe 8 CPU cycles.

At 72MHz, that still means I should be able to execute the ISR within
0.2us. Two channels should be about 0.5us, it'll be tight and I
probably won't hit the full 1MHz sample rate, but even if I wind up with
only 48kHz, that's still better than nothing.

The sticking point right now is in the handling of the output from the
LO. The I/Q DDS kit produces a square wave output. Initially this
concerned me a bit, as from my university days I understand square waves
to be rather harmonically rich.


Diode ring mixers basically end up acting like switches anyway. Sending
them square waves just means that the transition regions are smaller,
which should do no harm and may lead to less phase noise.


Ahh, that explains a few things. I'm guessing the only thing that
behaves anything like an ideal mixer is what I'd be trying to implement
in software?

Does it see the harmonics and if so, how do people deal with them?


Yes it 'sees' the harmonics. Basically -- even if you're exciting it
with a sine wave -- you should plan on the mixer's input being mixed
against a square wave.

In fact, some microwave equipment used to take advantage of this, to keep
the LO frequency down. It may still -- it's been a long time since I've
really paid attention to radio technology.


What sort of harmonics do those microwave circuits use? Would they try
for the third harmonic or higher?

I'm
guessing it does and that the answer is a liberal set of overlapping BPF
filters that can be switched in to cover the range of the DDS VFO. In
my case, a selection of filters that cover 0-30MHz.


Yup.

This is why modern radios (or at least radios as of 25 years ago, when I
was last paying attention) had a first IF above the band of interest --
it put the most significant frequencies that could be spuriously mixed
well above the desired reception frequency.


Indeed, I guess with this I should be able to go either way since it's
software controlled.

I'd have five GPIOs select them somehow from the STM32.


Why not 12? Surely you have lots of spare pins to play with.


Well, the big factor is how to switch between them all. More filters
means more switching logic, meaning more expense. I'm not sure if
CD4066's are any good at switching RF into the low VHF range so I'm
guessing it'd be mechanical relays and individually designed and built
filters.

I'm using a big quantity for driving an LCD: using the STM32 as an I/O
expander as well. The plan there is this all the real-time stuff would
run in ISRs and the display duties would be the main loop. I could use
an AVR to do this I guess though.

Regards,
Stuart Longland


  #6   Report Post  
Old February 11th 14, 05:01 PM posted to rec.radio.amateur.homebrew
external usenet poster
 
First recorded activity by RadioBanter: Jul 2013
Posts: 10
Default Front-end design for a DDS transceiver

On Tue, 11 Feb 2014 21:52:20 +1000, Stuart Longland VK4MSL wrote:

Hi Tim,
On 11/02/14 11:38, Tim Wescott wrote:
On Sun, 09 Feb 2014 15:44:26 +1000, Stuart Longland VK4MSL wrote:
My plan is something along these lines:

Receive:

ANT - [BPF] - [AMP] - [Mixer (LO=AD9851)]- ...
... [LPF] - [STM32 MCU] - [RPi]

I've omitted the quadrature part here; basically everything between
the front-end buffer amplifier and the STM32 would be duplicated.

The LPF would be set for the sample rate of the STM32; somewhere in
the realm of 250-500kHz low-pass. It'll depend on what I can achieve.


You're probably being ambitious with what can be done. While the ADC
can sample that fast, the processor -- even running at 48MHz or
whatever it can do -- may not be able to keep up.


Well, the STM32F103 runs at 72MHz, and if I were doing actual DSP with
it, it'd be light-on. The idea right now is just to have it capture the
waveform and shovel it down the I²S link as fast as it can.

So the interrupt routine would be copying from the ADC's output register
to one of two buffers then setting a flag. The plan is that the ADC
ISRs will be at most maybe 8 CPU cycles.

At 72MHz, that still means I should be able to execute the ISR within
0.2us. Two channels should be about 0.5us, it'll be tight and I
probably won't hit the full 1MHz sample rate, but even if I wind up with
only 48kHz, that's still better than nothing.


I don't know how much embedded programming you do, but with 25 years of
doing it professionally, I can assure you that there's always fewer clock
ticks available than you thought at the beginning of a project.

You can also use the DMA on the chip to your advantage. At the very
least you can read both channels into memory using DMA and only interrupt
once per pair; I'm pretty sure that you could set it up to DMA pairs into
a buffer and only interrupt you when the buffer is full. Then your ISR
would fire off less often and would be able to add up vectors full of
data, instead of doing it onsie-twosie. You end up with a bit more
overhead per interrupt, but a lot fewer interrupts.

The sticking point right now is in the handling of the output from the
LO. The I/Q DDS kit produces a square wave output. Initially this
concerned me a bit, as from my university days I understand square
waves to be rather harmonically rich.


Diode ring mixers basically end up acting like switches anyway.
Sending them square waves just means that the transition regions are
smaller, which should do no harm and may lead to less phase noise.


Ahh, that explains a few things. I'm guessing the only thing that
behaves anything like an ideal mixer is what I'd be trying to implement
in software?

Does it see the harmonics and if so, how do people deal with them?


Yes it 'sees' the harmonics. Basically -- even if you're exciting it
with a sine wave -- you should plan on the mixer's input being mixed
against a square wave.

In fact, some microwave equipment used to take advantage of this, to
keep the LO frequency down. It may still -- it's been a long time
since I've really paid attention to radio technology.


What sort of harmonics do those microwave circuits use? Would they try
for the third harmonic or higher?


Yes. I never actually messed with this -- I just read a lot, and had
friends who were into it.

I'm guessing it does and that the answer is a liberal set of
overlapping BPF filters that can be switched in to cover the range of
the DDS VFO. In my case, a selection of filters that cover 0-30MHz.


Yup.

This is why modern radios (or at least radios as of 25 years ago, when
I was last paying attention) had a first IF above the band of interest
-- it put the most significant frequencies that could be spuriously
mixed well above the desired reception frequency.


Indeed, I guess with this I should be able to go either way since it's
software controlled.

I'd have five GPIOs select them somehow from the STM32.


Why not 12? Surely you have lots of spare pins to play with.


Well, the big factor is how to switch between them all. More filters
means more switching logic, meaning more expense. I'm not sure if
CD4066's are any good at switching RF into the low VHF range so I'm
guessing it'd be mechanical relays and individually designed and built
filters.


CD4066's are fine for some things, but they're toys compared to what you
need here. You may be able to do it with PIN diode switches, but they
distort and take power -- there's a reason folks use relays.

I'm using a big quantity for driving an LCD: using the STM32 as an I/O
expander as well. The plan there is this all the real-time stuff would
run in ISRs and the display duties would be the main loop. I could use
an AVR to do this I guess though.


I hadn't realized you had other uses for the processor -- of course if
you've used up the pins then it makes sense to multiplex them somewhat.

--

Tim Wescott
Wescott Design Services
http://www.wescottdesign.com

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