As I said in my original post, there are plenty of 'stabilizers' available
for the taking. I have also seen a few PIC frequency counter implementations
that don't need any external gating. There are also plenty of PLL chips
which would do the job. However, I have not seen a software application for
the PIC that does it all without (hardly any) external hardware...this
should be possible.

What I want to do is create a tiny, low-power, stable & accurate HF
frequency source module. I think I can implement it with 2 packages...the
PIC and a VCO made out of biased-up CMOS inverters. I want to be able to
'hard-code' a frequency in some cases (fixed-frequency oscillator), or send
an arbitrary frequency word for variable frequency control in other cases
(VFO). This would be a very useful 'building-block' for making HF
communications gear.

The important factors for my applications are good tuning resolution,
reasonable lock-up time, and minimal phase noise. Of course, defining 'how
good is good enough' is somewhat subjective. Whether it's done as a PLL or
an FLL is somewhat semantic as most PLL synthesizer's really don't control
the short-term phase real well anyway.

Joe
W3JDR


"W3JDR" wrote in message
...
Anyone know of a PIC-based frequency locked loop for VFO control? I'm
looking for something that can be programmed with a frequency word, and
then
it aquires and maintains the frequency. I've seen frequency 'stabilizers'
but most of them just hold the frequency once it's been manually set.
There
are also PIC-assisted DDS designs, but these are more complex thatn I
want,
use more power then I'd like, and are not as clean as a simple voltage
controlled oscillator.
It seems to me that the PIC should be able to measure the frequency,
determine the error, and operate a very simple charge-pump/VCO to put the
frequency where it wants.

Joe
W3JDR

In article , "W3JDR"
writes:

The important factors for my applications are good tuning resolution,
reasonable lock-up time, and minimal phase noise. Of course, defining 'how
good is good enough' is somewhat subjective. Whether it's done as a PLL or
an FLL is somewhat semantic as most PLL synthesizer's really don't control
the short-term phase real well anyway.

Short-term phase stability almost always lies in the VCO design with
some disturbance possible by an incorrect loop filter. That has little
to do whether the VCO is used with a PLL or DDS.

To be phase-stable (i.e., reduce short-term jitter), the VCO supply rails
should be bypassed adequately well up into the RF range of the VCO
and the control voltage line absolutely free from any loop-induced
pickup almost to the VCO's RF range. Iron powder or ferrite beads,
even slabs of the stuff, can halp on the control line. Stability also
involves using whatever active device in the oscillator at its optimum
lowest-noise point...that's device dependent and not all manufacturers
supply such data.

In truth, I've never had experience with the PLL or DDS dividers as an
integral part of the frequency control determining processor. I've always
had to work some to make the external-divider kind lay down and be
nice. I would imagine there's more fun and games with a combined
type using a Microchip processor being both controller and divider. :-)

Len Anderson
retired (from regular hours) electronic engineer person

In article , "W3JDR"
writes:

The important factors for my applications are good tuning resolution,
reasonable lock-up time, and minimal phase noise. Of course, defining 'how
good is good enough' is somewhat subjective. Whether it's done as a PLL or
an FLL is somewhat semantic as most PLL synthesizer's really don't control
the short-term phase real well anyway.

Short-term phase stability almost always lies in the VCO design with
some disturbance possible by an incorrect loop filter. That has little
to do whether the VCO is used with a PLL or DDS.

To be phase-stable (i.e., reduce short-term jitter), the VCO supply rails
should be bypassed adequately well up into the RF range of the VCO
and the control voltage line absolutely free from any loop-induced
pickup almost to the VCO's RF range. Iron powder or ferrite beads,
even slabs of the stuff, can halp on the control line. Stability also
involves using whatever active device in the oscillator at its optimum
lowest-noise point...that's device dependent and not all manufacturers
supply such data.

In truth, I've never had experience with the PLL or DDS dividers as an
integral part of the frequency control determining processor. I've always
had to work some to make the external-divider kind lay down and be
nice. I would imagine there's more fun and games with a combined
type using a Microchip processor being both controller and divider. :-)

Len Anderson
retired (from regular hours) electronic engineer person