"Avery Fineman" wrote in message
...

....snip...

To avoid quantization errors of setting the internal calendar clock,
the "update" could advance or retard the crystal through a VCXO
circuit driven by a D-to-A whose digital correction is derived from
a comparison of the NIST time code to the internal calendar
clock. Kind of a very slow phase-lock done the hard way. Might
take days to get in phase. :-)


....snip...


Len Anderson
retired (from regular hours) electronic engineer person

I have watched one of my two radio clocks do precisely this - they appear to
have this iterative locking feature built in. The internal clock was first
fast two or three seconds, and the next day, slow by one or so; at the end
of a week it was right on WWV and has been ever since.

--
Chip
KC5UES
real e-mail address:






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