John Larkin wrote:


Looks like the jfet will be saturated with the values shown, not good
for RF work. Looks like he got the sign of Vgs backwards. The next
example on the same page illustrates that Vg must be near zero, not
+5. Really silly, putting these two circuits side-by-side.

John


Shhhh...don't tell the resident idiot, but it's going to be damn tough
biasing that IDSS=5mA JFET to a quiescent ID=10ma....

On Thu, 12 Aug 2004 02:58:57 GMT, Fred Bloggs
wrote:



John Larkin wrote:


Looks like the jfet will be saturated with the values shown, not good
for RF work. Looks like he got the sign of Vgs backwards. The next
example on the same page illustrates that Vg must be near zero, not
+5. Really silly, putting these two circuits side-by-side.

John


Shhhh...don't tell the resident idiot, but it's going to be damn tough
biasing that IDSS=5mA JFET to a quiescent ID=10ma....


Good point. Bowick seems to be applying the jfet gate-voltage equation
backwards to enhance it! The other example on page 120 is even
sillier.

Just shows you that an RF expert can't always handle DC.

John

On Thu, 12 Aug 2004 08:28:41 -0700, John Larkin wrote:

On Thu, 12 Aug 2004 02:58:57 GMT, Fred Bloggs
wrote:



John Larkin wrote:


Looks like the jfet will be saturated with the values shown, not good
for RF work. Looks like he got the sign of Vgs backwards. The next
example on the same page illustrates that Vg must be near zero, not
+5. Really silly, putting these two circuits side-by-side.

John


Shhhh...don't tell the resident idiot, but it's going to be damn tough
biasing that IDSS=5mA JFET to a quiescent ID=10ma....

LOL. That was an astute observation, not that I'm surprised. Either
I didn't read that part of the book ( I have a NOV '82 Siliconix
data book that sufficed) or I blew it off.

Good point. Bowick seems to be applying the jfet gate-voltage equation
backwards to enhance it! The other example on page 120 is even
sillier.

I *do* remember reading *that*. 0 + 2.48 = 0 for sufficiently small
values of 2.48, yup. I better compare all his refs to my own
collection of app notes in der future and check the math.

Just shows you that an RF expert can't always handle DC.


It's his math, actually. See my other post and while you're at it,
reply to my reply to the idiot so he can see it. A blank post will
suffice -)

--
Best Regards,
Mike

On Thu, 12 Aug 2004 18:57:34 -0400, Active8
wrote:


I *do* remember reading *that*. 0 + 2.48 = 0 for sufficiently small
values of 2.48, yup.

Now *that's* funny!

Too bad Paul won't see it!

John

On Thu, 12 Aug 2004 16:47:30 -0700, John Larkin wrote:

On Thu, 12 Aug 2004 18:57:34 -0400, Active8
wrote:

I *do* remember reading *that*. 0 + 2.48 = 0 for sufficiently small
values of 2.48, yup.

Now *that's* funny!

Too bad Paul won't see it!

John

Based on some recent posts, I suspect that duplicitous white trash
POS is reading my posts despite his blasting JT for "not sticking to
his [ctrl-k] guns" just to see what I'm saying behind his back. It's
not really backstabbing since it's out in the open and I'd say it to
his face before I rearrange it like so much algebra.

I think he needs a good old fashioned hillbilly ass-whoopin' what
with the way he's flaming a few of us and making hillbilly slurs.

Apologies again for the multiple replies to self while working this
out. That Siliconix book used design curves and iterative stuff.

I'd be impressed if SFB Burridge (rhymes with porridge - like the
space between his audio sensors) could solve the bias net (or any
net) on his own.
--
Best Regards,
Mike

In article ,
Fred Bloggs wrote:


John Larkin wrote:


Looks like the jfet will be saturated with the values shown, not good
for RF work. Looks like he got the sign of Vgs backwards. The next
example on the same page illustrates that Vg must be near zero, not
+5. Really silly, putting these two circuits side-by-side.

John


Shhhh...don't tell the resident idiot, but it's going to be damn tough
biasing that IDSS=5mA JFET to a quiescent ID=10ma....

Theres no problem getting 10mA to flow in a FET with Idss of 5mA. Just
apply a positive bias to the gate. I've had as much as 2 or 3 A flow
through a JFET this way.


--
--
forging knowledge

On Fri, 13 Aug 2004 03:49:15 +0000 (UTC),
(Ken Smith) wrote:

Theres no problem getting 10mA to flow in a FET with Idss of 5mA. Just
apply a positive bias to the gate. I've had as much as 2 or 3 A flow
through a JFET this way.

How many mS did the Fet last? I suppose you could always stand there
with a can of arctic spray directed on it, but I doubt the customer
would be impressed. ;-)
--

"What is now proved was once only imagin'd." - William Blake, 1793.

Paul Burridge wrote:
On Fri, 13 Aug 2004 03:49:15 +0000 (UTC),
(Ken Smith) wrote:


Theres no problem getting 10mA to flow in a FET with Idss of 5mA. Just
apply a positive bias to the gate. I've had as much as 2 or 3 A flow
through a JFET this way.


How many mS did the Fet last? I suppose you could always stand there
with a can of arctic spray directed on it, but I doubt the customer
would be impressed. ;-)

Actually there have been systems produced that did run quite hot and
were arranged with a liquid nitrogen drip onto the electronics to keep
things cool.

In (rec.radio.amateur.homebrew), Fred Bloggs wrote:

Paul Burridge wrote:
On Fri, 13 Aug 2004 03:49:15 +0000 (UTC),
(Ken Smith) wrote:


Theres no problem getting 10mA to flow in a FET with Idss of 5mA. Just
apply a positive bias to the gate. I've had as much as 2 or 3 A flow
through a JFET this way.


How many mS did the Fet last? I suppose you could always stand there
with a can of arctic spray directed on it, but I doubt the customer
would be impressed. ;-)

Actually there have been systems produced that did run quite hot and
were arranged with a liquid nitrogen drip onto the electronics to keep
things cool.

One model of Seymour Cray's computers ran with the logic immersed in
a bath of chilled Fluorinert or some such, with a fairly hefty pump
to keep the coolant recirculating through the chiller.

--
Paul Raj Khangure mumbled:
Every time someone calls Java a programming language a fairy dies?
From frustration, if nothing else.
DaZZa, in a.t-s.r

On Fri, 13 Aug 2004 12:54:14 +0000, Mike Andrews wrote:

In (rec.radio.amateur.homebrew), Fred Bloggs wrote:

Paul Burridge wrote:
On Fri, 13 Aug 2004 03:49:15 +0000 (UTC),
(Ken Smith) wrote:


Theres no problem getting 10mA to flow in a FET with Idss of 5mA. Just
apply a positive bias to the gate. I've had as much as 2 or 3 A flow
through a JFET this way.


How many mS did the Fet last? I suppose you could always stand there
with a can of arctic spray directed on it, but I doubt the customer
would be impressed. ;-)

Actually there have been systems produced that did run quite hot and
were arranged with a liquid nitrogen drip onto the electronics to keep
things cool.

One model of Seymour Cray's computers ran with the logic immersed in
a bath of chilled Fluorinert or some such, with a fairly hefty pump
to keep the coolant recirculating through the chiller.

Many years before, IBM was going to use a CFC (FC86, IIRC) in much the
same way. The logic modules were about 4" cubes with a multi-layer
(50-60, can't remember) ceramic substrate with 100 logic chips on one
side, a water-filled cold-plate on the other, and filled with the CFC.
Heat was removed from back-side of the chips by boiling the CFC. I worked
on a logic tester in '75 that immersed the un-encapsulated substrate into
a bath of CFCs so it could be probed.

Unfortunately, boiling the CFC also distilled it, leaving any
contamination on the chips. The result came to be known as the "black
plague". Because of the "black plague" the "LEM" (Liquid Encapsulated
Module) was replaced by a similar looking (though shorter) "TCM" (Thermal
Conduction Module) which used pistons on the backside of the chips
(increased to 121 chips) to transfer heat (10W per chip, 1200W total) to
the cold-plate and filled with helium. The TCMs were used throught the
'80s and early '90s for the high-end ECL systems.

--
Keith