For a well designed integrated circuit, the most likely thing to fail
is the package, which in turn leads to failure in the bonding. Consumer
grade electronics use porous plastic packages, while the military forks
out for ceramic.

It is possible to get ion contaminator from how the wafers were handled
(such as a moron touching the edge), but the associated threshold
shifts show up very soon. I'm not sure if you can find this on the net,
but all the IC companies do some sort of die seal to reduce this
problem.

I'd blame the capacitors, especially tantalum. Resistors should be
stable.

Regarding electromigration, this is also well understood and
compensated for in the design process.

I can tell you that most chips coming to a failure analysis lab are
damaged by electrical overstress. Often a power surge will shoot right
through the power supply and zap some chip. [Some radios are "always
on" if hooked up to the AC mains, so a radio that is off can get
zapped.] Second comes latch-up related problems, not exactly the fault
of the chip, i.e. all chips using reverse biased diode isolation will
latch under some external conditions.