On 11/3/2014 3:08 AM, Rob wrote:
George Cornelius wrote:
Motorola's app notes on the old 4000 series CMOS included
various analog circuits, including use of a CMOS inverter
as an amplifier. I'm enough of a packrat that I keep those
things.

I'm sure this guy (who is coming back on this subject regularly) is
not going to consider that low-power. The inverter was driven into
the area between switching to '1' and to '0' by using a feedback
resistor, and so both output fets are conducting and drawing current
from Vcc to Gnd.

If you I am "the guy", whether or not this is low power enough depends
on the power. My understanding is that when operated in the linear mode
significant current can flow in a CMOS device. So likely this isn't low
enough power, no.

I'm very curious about how they do it in the commercial chips. I have
seen block diagrams and they show an amplifier as the first part of the
chip. Maybe the design really isn't all that low power. Rather than
running at low power all the time, they just limit the duty cycle of the
receiver. "Atomic" clocks don't need to monitor the signal except for a
few minutes each day.

--

Rick