I'm working on a SDR design using the AD9874 to
digitize the IF producing 280 Ksamples/sec and
am trying to size the DSP. I'm leaning towards
the ADSP-BF532 which is a fixed point DSP rated
at 400 MIPS / 800 MMACS and is available in a LQFP
package. I'd like to be able to handle everything
from decoding standard shortwave SSB signals to
broadcast FM stereo signals (including RDS).

1) Any pointers to information which can be used
to size the DSP in terms of MIPS, program RAM,
and data RAM? Something like a minimum of X MIPS
are needed to do a reasonable job handling
broadcast FM stereo signals (which I'm assuming
require more MIPS than SSB) would be useful
to know.

2) Anyone have a specific DSP they favored for
this type of application? Keep in mind I
need the DSP to be in a package I can handle
using home equipment. It would be nice if the
DSP was flexible enough so that it can be used
for general purpose things such as controlling
the keyboard and LCD instead of adding a
microcontroller.

I'm not looking to use a FPGA at this time.

-- John
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wrote:
I'm working on a SDR design using the AD9874 to
digitize the IF producing 280 Ksamples/sec and
am trying to size the DSP.
snip

2) Anyone have a specific DSP they favored for
this type of application? Keep in mind I
need the DSP to be in a package I can handle
using home equipment. It would be nice if the
DSP was flexible enough so that it can be used
for general purpose things such as controlling
the keyboard and LCD instead of adding a
microcontroller.


Can your design live with fewer MIPS and a lower sample
rate (downconvert the IF)? I'm working on a design
using a old DSP sound card which will talk to my mcu in
the radio; the card has a TSM320 DSP, a great (free)
toolchain, lots of sample code, and no need to fab a
pcb. Of course its resources are an order of magnitude
less than you've specified but it will still do filtering
and demodulation.

If this approach is of any use, I'll send you the toolchain
and docs

Regards,

Michael

On Thu, 21 Jun 2007 17:44:13 -0700, john wrote:

I'm working on a SDR design using the AD9874 to
digitize the IF producing 280 Ksamples/sec and
am trying to size the DSP. I'm leaning towards
the ADSP-BF532 which is a fixed point DSP rated
at 400 MIPS / 800 MMACS and is available in a LQFP
package. I'd like to be able to handle everything
from decoding standard shortwave SSB signals to
broadcast FM stereo signals (including RDS).

1) Any pointers to information which can be used
to size the DSP in terms of MIPS, program RAM,
and data RAM? Something like a minimum of X MIPS
are needed to do a reasonable job handling
broadcast FM stereo signals (which I'm assuming
require more MIPS than SSB) would be useful
to know.

2) Anyone have a specific DSP they favored for
this type of application? Keep in mind I
need the DSP to be in a package I can handle
using home equipment. It would be nice if the
DSP was flexible enough so that it can be used
for general purpose things such as controlling
the keyboard and LCD instead of adding a
microcontroller.

I'm not looking to use a FPGA at this time.

1. I generally do this by prototyping the algorithms using Scilab, or
designing them on paper, then figuring out the number of operations (for
MIPS) and data storage requirements. You'll probably find that the FM
demodulation takes the most processor time, unless you're decoding
multiple SSB channels for some odd reason.

2. I make a conscious effort to not fall in love with any particular
processor. Look at a few different choices in your target word
size and data type, and try to get a feel for how much time it'll take to
run your algorithms.

1 & 2. _Don't_ forget the 'regular processor' stuff when you're sizing
memory and processor bandwidth! Wouldn't you feel silly if you had 20
times the RAM you needed for your DSP, but didn't have the buffer space
necessary for your TCP/IP stack, or if your algorithm took up 500 words of
memory but you ran out of space for menu lines in ROM? Generally with
these mixed-target DSP projects you can expect 1% of the code to take 95%
of the consumed processing power; you need to make sure you have the code
space for the other stuff.

--
Tim Wescott
Control systems and communications consulting
http://www.wescottdesign.com

Need to learn how to apply control theory in your embedded system?
"Applied Control Theory for Embedded Systems" by Tim Wescott
Elsevier/Newnes, http://www.wescottdesign.com/actfes/actfes.html

On Thu, 21 Jun 2007 17:44:13 -0700, wrote:

I'm working on a SDR design using the AD9874 to
digitize the IF producing 280 Ksamples/sec and
I am way behind you guys on the DSP-SDR subject but I appreciate every
scrap of information you share.

I am currently trying to puzzle out the strategy used in acquiring
data from a sound card.

I have successfully built the Softrock Lite 40 meter receiver and am
ever so slowly working on a Softrock RXTX Ver 6.2 40 M transceiver.

John Ferrell W8CCW
"Life is easier if you learn to
plow around the stumps"

wrote:

I'm working on a SDR design using the AD9874 to

Fair performance is guaranteed.

digitize the IF producing 280 Ksamples/sec and
am trying to size the DSP.

Get the biggest one. Like Intel P4.

I'm leaning towards
the ADSP-BF532 which is a fixed point DSP rated
at 400 MIPS / 800 MMACS

800 MMACS is a pure marketing. The 400 MIPS is closer to the reality.

and is available in a LQFP
package. I'd like to be able to handle everything
from decoding standard shortwave SSB signals to
broadcast FM stereo signals (including RDS).

I like your optimism.

1) Any pointers to information which can be used
to size the DSP in terms of MIPS, program RAM,
and data RAM? Something like a minimum of X MIPS
are needed to do a reasonable job handling
broadcast FM stereo signals (which I'm assuming
require more MIPS than SSB) would be useful
to know.

* It depends
* The barebone DSP functionality will take about 20...30 kbytes of the
program memory and several kbytes of the data memory.
* For the single channel processing, the workload should not exceed
about 100 MIPS.

2) Anyone have a specific DSP they favored for
this type of application?

It doesn't matter. Whatever DSP you wil take, you will be screwed many
times.

Keep in mind I
need the DSP to be in a package I can handle
using home equipment.

)))))

It would be nice if the
DSP was flexible enough so that it can be used
for general purpose things such as controlling
the keyboard and LCD instead of adding a
microcontroller.

The general purpose stuff can easily boost the program size over the DSP
internal memories.

I'm not looking to use a FPGA at this time.

Why don't you start learning DSP with something simple like FIR or IIR
filter?


Vladimir Vassilevsky

DSP and Mixed Signal Design Consultant

http://www.abvolt.com

Vladimir Vassilevsky wrote:


Why don't you start learning DSP with something simple like FIR or IIR
filter?


Vladimir Vassilevsky

DSP and Mixed Signal Design Consultant

http://www.abvolt.com

Probably because he finds a "Software Defined Radio" to be fascinating.
I know that's my motivation for applying fft's to speech and GPS errors.
I'd lay odds that the majority of scientific/technical progress is due
to amateurs. { please check your etymology before opening fire ;

Think about bio's of ancient Greek philosophersetymology;, membership
of Royal Society(astronomers particularly came to mind), Einstein,
Goddard, Avins, Lyons, Allnor ... thru eons of grad students and even
some professors with Phd's.

On Jun 22, 10:58 am, Vladimir Vassilevsky
wrote:
wrote:
I'm working on a SDR design using the AD9874 to

Fair performance is guaranteed.

Do you mean "fair" as in good performance or as in marginal
performance?

If you mean good performance, then I quite happy to hear it's
guaranteed. :-)

wrote:

On Jun 22, 10:58 am, Vladimir Vassilevsky
wrote:

wrote:

I'm working on a SDR design using the AD9874 to

Fair performance is guaranteed.


Do you mean "fair" as in good performance or as in marginal
performance?

I mean this toy will work however the performance of the classic analog
receiver of the communication class is much better.

Vladimir Vassilevsky

DSP and Mixed Signal Design Consultant

http://www.abvolt.com

On Jun 22, 8:23 pm, Vladimir Vassilevsky
wrote:
I mean this toy will work

I'm willing to accept some tradeoffs for the sake
of simplifying the design (i.e. the AD9874 integrates
an ADC and digital filter which is convenient though
less flexible then a ADC coupled with a FPGA).

however the performance of the classic analog
receiver of the communication class is much better.

That seems to imply some type of fundamental limitation
exists with using the AD9874. Care to be more specific?
For example the AD9874 spec claim 95 dB dynamic range,
there are certainly radios which claim a higher dynamic
range. However I'm imagining that a 95 dB dynamic range
should work for a lot of signals.

On Thu, 21 Jun 2007 17:44:13 -0700, wrote:

I'm working on a SDR design using the AD9874 to
digitize the IF producing 280 Ksamples/sec and
am trying to size the DSP. I'm leaning towards
the ADSP-BF532 which is a fixed point DSP rated
at 400 MIPS / 800 MMACS and is available in a LQFP
package. I'd like to be able to handle everything
from decoding standard shortwave SSB signals to
broadcast FM stereo signals (including RDS).


I am not familiar with that specific component, but does it really
contain a decent S&H circuit for decimation ?

Even with a proper S&H (ten nanosecond sampling and several
microsecond hold times) for decimation, the 280 Ksamples/s sounds a
bit low for FM broadcast detection. The higher order (Bessel function)
sidebands are still quite strong with the modulation indexes used, so
truncating the bandwidth to the 100-140 kHz range might not be a good
idea.

If you after all want to include broadcast FM reception, I would
suggest that you do the reception in analog way and only go to digital
after the ratio detector, when 150 kHz sampling rate might be
sufficient for stereo and RDS separation.

For the other modulation modes, I would suggest using a high 1st IF
(40-80 MHz) with a proper roofing filter combined with a few IF stages
and AGC. This signal might then be decimated directly (or after
converting to 455 kHz for steeper filters) and processed at sampling
rates well below 100 Ksamples/s.

With the roofing filter and the AGC in the first IF, the ADC should be
able to handle large signal variations, as long as the offending
signal is not within the roofing filter bandwidth.

Paul OH3LWR