On Monday, June 9, 2003 at 9:58:46 AM UTC+10, John Miles wrote:
This question may be related to one that Jan Wagner posted awhile back.
Jan was having trouble with excessive jitter

PLL-like nature of these graphs suggested a problem with the chip's
clock multiplier. I was able to confirm that indeed, the problem
occurred ONLY with the DDS chip's internal PLL-based clock multiplier
engaged, with a 10 MHz external clock being multiplied to frequencies
between 80 and 120 MHz. With an unmultiplied 100 MHz external clock,
the DDS works perfectly with no 'ears', spurs, or instability.

At this time I don't understand what's going on with this assembly.
It's not a complicated circuit; the AD9854 is a very robust, hard-to-
screw-up chip, and in general there's very little to go wrong. I have a
good deal of experience with the AD9852 / AD9854 parts, and have never
seen this behavior before.

Has anyone else run into this weirdness?

-- jm

------------------------------------------------------
------------------------------------------------------

JIM .. phase jitter in this device is certainly due to the clk multiplier, what did u do to pin 22 , spec is to decouple it to Analog Ground , bet u couple it to Dig GND . U also need 2 regulated supplies not the lazy single u have. not only that 10MHz clock is outside the spec of min 20MHz .. Regardless, of those 2 or 3 failures , a 4:1 balun ought be used for ext single to differential input for such a critical issue.

Little wonder amateur radio is called by the name. Go on.. get out of joint

I was searching for issues in the Chinese boards.. have bought the parallel port with mezzanine controller and the only USB single board with JTAG and dual regulators .. Anyone used either of these $100 boards ? its 2016 , sure is hard to find peop outside of China AD using the good oil .. this is actually a great digital PLL for a Rx digital radio ..Rus Talisin on g+

On 10/28/2016 4:46 AM, wrote:
On Monday, June 9, 2003 at 9:58:46 AM UTC+10, John Miles wrote:
This question may be related to one that Jan Wagner posted awhile back.
Jan was having trouble with excessive jitter

PLL-like nature of these graphs suggested a problem with the chip's
clock multiplier. I was able to confirm that indeed, the problem
occurred ONLY with the DDS chip's internal PLL-based clock multiplier
engaged, with a 10 MHz external clock being multiplied to frequencies
between 80 and 120 MHz. With an unmultiplied 100 MHz external clock,
the DDS works perfectly with no 'ears', spurs, or instability.

At this time I don't understand what's going on with this assembly.
It's not a complicated circuit; the AD9854 is a very robust, hard-to-
screw-up chip, and in general there's very little to go wrong. I have a
good deal of experience with the AD9852 / AD9854 parts, and have never
seen this behavior before.

Has anyone else run into this weirdness?

-- jm

------------------------------------------------------
------------------------------------------------------

JIM .. phase jitter in this device is certainly due to the clk multiplier, what did u do to pin 22 , spec is to decouple it to Analog Ground , bet u couple it to Dig GND . U also need 2 regulated supplies not the lazy single u have. not only that 10MHz clock is outside the spec of min 20MHz .. Regardless, of those 2 or 3 failures , a 4:1 balun ought be used for ext single to differential input for such a critical issue.

Little wonder amateur radio is called by the name. Go on.. get out of joint

I was searching for issues in the Chinese boards.. have bought the parallel port with mezzanine controller and the only USB single board with JTAG and dual regulators .. Anyone used either of these $100 boards ? its 2016 , sure is hard to find peop outside of China AD using the good oil .. this is actually a great digital PLL for a Rx digital radio ..Rus Talisin on g+




LOL, anonymous troll replying to a 13 year old message and criticizing
the OP.

But it's what we expect from someone with a gmail address.

--
==================
Remove the "x" from my email address
Jerry, AI0K

==================

On Fri, 28 Oct 2016, Jerry Stuckle wrote:

On 10/28/2016 4:46 AM, wrote:
On Monday, June 9, 2003 at 9:58:46 AM UTC+10, John Miles wrote:
This question may be related to one that Jan Wagner posted awhile back.
Jan was having trouble with excessive jitter

PLL-like nature of these graphs suggested a problem with the chip's
clock multiplier. I was able to confirm that indeed, the problem
occurred ONLY with the DDS chip's internal PLL-based clock multiplier
engaged, with a 10 MHz external clock being multiplied to frequencies
between 80 and 120 MHz. With an unmultiplied 100 MHz external clock,
the DDS works perfectly with no 'ears', spurs, or instability.

At this time I don't understand what's going on with this assembly.
It's not a complicated circuit; the AD9854 is a very robust, hard-to-
screw-up chip, and in general there's very little to go wrong. I have a
good deal of experience with the AD9852 / AD9854 parts, and have never
seen this behavior before.

Has anyone else run into this weirdness?

-- jm

------------------------------------------------------
------------------------------------------------------

JIM .. phase jitter in this device is certainly due to the clk multiplier, what did u do to pin 22 , spec is to decouple it to Analog Ground , bet u couple it to Dig GND . U also need 2 regulated supplies not the lazy single u have. not only that 10MHz clock is outside the spec of min 20MHz .. Regardless, of those 2 or 3 failures , a 4:1 balun ought be used for ext single to differential input for such a critical issue.

Little wonder amateur radio is called by the name. Go on.. get out of joint

I was searching for issues in the Chinese boards.. have bought the parallel port with mezzanine controller and the only USB single board with JTAG and dual regulators .. Anyone used either of these $100 boards ? its 2016 , sure is hard to find peop outside of China AD using the good oil .. this is actually a great digital PLL for a Rx digital radio ..Rus Talisin on g+




LOL, anonymous troll replying to a 13 year old message and criticizing
the OP.

But it's what we expect from someone with a gmail address.

After thirteen years, you'd think something else would have come along,
and replaced it with better specs. We're more likely to get a post asking
where to get something that's no longer made than from someone using the
same device over a decade later.

I've seen this sort of thread resurrected in the Linux newsgroups, and
someone inevitably posts "that's a really old version of Linux, why don't
you upgrade?" Well it was cutting edge ten or twenty years before.

Michael

On 10/28/2016 5:14 PM, Michael Black wrote:
On Fri, 28 Oct 2016, Jerry Stuckle wrote:

On 10/28/2016 4:46 AM, wrote:
On Monday, June 9, 2003 at 9:58:46 AM UTC+10, John Miles wrote:
This question may be related to one that Jan Wagner posted awhile back.
Jan was having trouble with excessive jitter

PLL-like nature of these graphs suggested a problem with the chip's
clock multiplier. I was able to confirm that indeed, the problem
occurred ONLY with the DDS chip's internal PLL-based clock multiplier
engaged, with a 10 MHz external clock being multiplied to frequencies
between 80 and 120 MHz. With an unmultiplied 100 MHz external clock,
the DDS works perfectly with no 'ears', spurs, or instability.

At this time I don't understand what's going on with this assembly.
It's not a complicated circuit; the AD9854 is a very robust, hard-to-
screw-up chip, and in general there's very little to go wrong. I
have a
good deal of experience with the AD9852 / AD9854 parts, and have never
seen this behavior before.

Has anyone else run into this weirdness?

-- jm

------------------------------------------------------
------------------------------------------------------

JIM .. phase jitter in this device is certainly due to the clk
multiplier, what did u do to pin 22 , spec is to decouple it to
Analog Ground , bet u couple it to Dig GND . U also need 2 regulated
supplies not the lazy single u have. not only that 10MHz clock is
outside the spec of min 20MHz .. Regardless, of those 2 or 3 failures
, a 4:1 balun ought be used for ext single to differential input for
such a critical issue.

Little wonder amateur radio is called by the name. Go on.. get out of
joint

I was searching for issues in the Chinese boards.. have bought the
parallel port with mezzanine controller and the only USB single board
with JTAG and dual regulators .. Anyone used either of these $100
boards ? its 2016 , sure is hard to find peop outside of China AD
using the good oil .. this is actually a great digital PLL for a Rx
digital radio ..Rus Talisin on g+




LOL, anonymous troll replying to a 13 year old message and criticizing
the OP.

But it's what we expect from someone with a gmail address.

After thirteen years, you'd think something else would have come along,
and replaced it with better specs. We're more likely to get a post
asking where to get something that's no longer made than from someone
using the same device over a decade later.

I've seen this sort of thread resurrected in the Linux newsgroups, and
someone inevitably posts "that's a really old version of Linux, why
don't you upgrade?" Well it was cutting edge ten or twenty years before.

Michael


Yea, it happens occasionally in other newsgroups, including ham radio.
And the one thing in common is the poster is always a numb nuts from
google groups, almost always with a gmail address.

Google groups is a bane to usenet.

--
==================
Remove the "x" from my email address
Jerry, AI0K

==================

Michael Black wrote:
On Fri, 28 Oct 2016, Jerry Stuckle wrote:

On 10/28/2016 4:46 AM, wrote:
On Monday, June 9, 2003 at 9:58:46 AM UTC+10, John Miles wrote:
This question may be related to one that Jan Wagner posted awhile back.
Jan was having trouble with excessive jitter

PLL-like nature of these graphs suggested a problem with the chip's
clock multiplier. I was able to confirm that indeed, the problem
occurred ONLY with the DDS chip's internal PLL-based clock multiplier
engaged, with a 10 MHz external clock being multiplied to frequencies
between 80 and 120 MHz. With an unmultiplied 100 MHz external clock,
the DDS works perfectly with no 'ears', spurs, or instability.

At this time I don't understand what's going on with this assembly.
It's not a complicated circuit; the AD9854 is a very robust, hard-to-
screw-up chip, and in general there's very little to go wrong. I have a
good deal of experience with the AD9852 / AD9854 parts, and have never
seen this behavior before.

Has anyone else run into this weirdness?

-- jm

------------------------------------------------------
------------------------------------------------------

JIM .. phase jitter in this device is certainly due to the clk multiplier, what did u do to pin 22 , spec is to decouple it to Analog Ground , bet u couple it to Dig GND . U also need 2 regulated supplies not the lazy single u have. not only that 10MHz clock is outside the spec of min 20MHz .. Regardless, of those 2 or 3 failures , a 4:1 balun ought be used for ext single to differential input for such a critical issue.

Little wonder amateur radio is called by the name. Go on.. get out of joint

I was searching for issues in the Chinese boards.. have bought the parallel port with mezzanine controller and the only USB single board with JTAG and dual regulators .. Anyone used either of these $100 boards ? its 2016 , sure is hard to find peop outside of China AD using the good oil .. this is actually a great digital PLL for a Rx digital radio ..Rus Talisin on g+




LOL, anonymous troll replying to a 13 year old message and criticizing
the OP.

But it's what we expect from someone with a gmail address.

After thirteen years, you'd think something else would have come along,
and replaced it with better specs. We're more likely to get a post asking
where to get something that's no longer made than from someone using the
same device over a decade later.

When anyone has hints on such more modern devices I am always interested!
- reference 10 MHz
- DDS clock = 1 GHz
- Support for NBFM modulation
- Spurious levels suitable for hamradio transmission on 2m/70cm