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Old February 25th 06, 07:05 PM posted to sci.electronics.design,comp.arch.fpga,rec.radio.amateur.homebrew
Hal Murray
 
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Default Input stage for VHF frequency counter in an FPGA?


http://www.onsemi.com/PowerSolutions...=MC100EPT21DR2


Be sure to check the output with a scope.

Years ago, I used a PECL=TTL part. That was real/old, 5V TTL.
The problem was that I really wanted a CMOS output and what I
got was a TTL signal that only went up to 4V or so. We had to
run it through an AC dead-bug to get what we wanted.

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