wrote in message
...
On Feb 20, 3:56 pm, "amdx" wrote:
wrote in message

...
On Feb 20, 12:39 pm, John Larkin

wrote:
On Sun, 20 Feb 2011 09:20:12 -0600, "amdx" wrote:
Hi all,
I finished the amp that had the 5 Ghz transistor, I changed it to a
slower
one.
The objective of this amp is to cause minimal loading of the circuit
it
is
measuring.
When I install the box cover the voltage gain drops by 7%, so I think
the
input capacitor
plate is being loaded by the cover.
The input capacitor plates can be seen here;

http://i395.photobucket.com/albums/p...mspaced5mm.jpg

The plates are 1 cm x 1 cm spaced 5 mm apart.

I have thoughts about rectangular plates 0.25 cm x 4 cm to get more
distance from the top cover, (and the bottom.)
Or a real gimmick cap where I twist a couple of 39 Gauge wires
together
and
attach opposite ends to input and output.

Any ideas to minimize input capacitance to the box?

Here's the amp in box.
http://i395.photobucket.com/albums/p...erampinbox.jpg

This is the original circuit page with schematic;
http://www.crystal-radio.eu/enfetamp.htm
Thanks, Mike

PS, I was having trouble getting some close-up pictures, I grabbed a
magnifying glass and took some
pictures through that, works good.

Use a real surface-mount 0.3 pF cap, or a homemade coaxial cap. The 1
cm square plates are too big and have their own capacitance to the
world.

.................................................. ...........

For that matter the tiny input cap in Mike's circuit is
counterproductive--it divides the signal down and makes the gain
unpredictable.

It's not so inpredictable, I set the amplifier gain at 17 and then
adjusted
the capacitor spacing for a total amplifier gain of 1.
I'm not being argumentive, just trying understand.
........................................
The input gain of the original circuit depends on the voltage divider
comprising your gimmick cap, on the one hand, and the FET's
capacitance on the other.

No two FETs will have the same capacitance, so you can't know in
advance exactly what the circuit's gain will be. That's why you have
to tweak it via the input capacitor right now.

Hmm. I might have got a hot FET as my cap is spaced 5 mm vs his 3mm.
I calculated 0.177pf for my cap.
Had adjusted the circuit voltage gain after the FET circuit for 17. Then
adjusted the cap for a total gain of 1.

Better: use 10pF coupling, lose less at the input, and use less gain
later. Bootstrap the FET so the input sees very low C. Do those and
you don't even need a gimmick.

I need to know more about bootstraping.
Also doesn't the 0.3pf cap reduce the loading effect of the 20 Meg
resistor?
Thanks, Mikek

Not really. At 1MHz, 0.3pf has a reactance of 530K, so it just adds
530K in series with 20M. It also attenuates your signal by a factor
of 17, if the writeup is accurate.

Oh, I had assumed a much higher impedance for that small cap.
Best not to assume :-)

The author says the amp's input capacitance is 1.4pF. That means
either there's a lot of stray capacitance, or the input coupling cap
is actually a lot larger than 0.3pF.

I'll be trying the twisted pair to reduce that stray capacitance.
Mikek