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  #161   Report Post  
Old March 14th 04, 09:27 PM
Paul Burridge
 
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On Sun, 14 Mar 2004 12:04:18 -0800, John Larkin
wrote:


Why not just bandpass filter the 5th from the square wave? Too simple?


I suggested this a while ago, but no one seemed very keen on that
solution for some reason. Pity, as it does seem to Spice very well. A
5/6V TTL level square wave winds up as around .5 of a volt of 5th
harmonic, post-filtering. Not bad!
--

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  #164   Report Post  
Old March 14th 04, 09:58 PM
Paul Burridge
 
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On Sun, 14 Mar 2004 15:55:04 -0500, Active8
wrote:

On Sun, 14 Mar 2004 13:14:40 +0000, Paul Burridge wrote:

On Sat, 13 Mar 2004 20:23:45 -0500, Active8
wrote:

Just a rough guess, since your calling on supreme beings...


The post is still vacant as yet...
:-)

That input cap... I take it the input source is a reasonable
estimate of your square wave... if the time constant of that input
RC net isn't right, it'll be a differentiator, and turn your square
wave into pulses coincident with the rising and falling edges. Your
scope trace suggested otherwise, but IIRC, at that tin=me you were
using the filter at the input to the mult., xo things have changed.


There's been no filtering (other than the selective properties of the
tank circuits) whatsoever employed thus far.

It doesn't look like you're biased in Class C. All the mults I've
seen are Class C biased with the tuned circuit on the collector. And
remember, when you're doing this later for some other purpose, in
Class C, the transistors Vceo - reverse breakdown - must be at least
twice the supply voltage.


Yup, perfectly correct. I must admit that going the class C route with
the tank tuned to the required harmonic was the way I was 'brought up'
as it were. Class C typically generates lots of harmonics as you
obviously know. This multiplier seems to be operating in class A,
which I admit is odd given its high linearity. But I didn't design the
multiplying stage you see here, but the guy who did is an RF expert so
I don't argue. :-)

But you've just given me an idea: maybe I should increase the value of
the 82 ohm base-ground resistor to increase drive signal level and tip
the stage into class C. Worth a try?


Nah. With a *sine* input, you'd bias it so it only conducts for less
than 180 degrees of the fundamental's cycle - keep the trans *out*
of conduction for the most part. Now that I think of it, yer using a
square wave and should have the stinkin' harmonic already, duh. What
was I thinkin'? I still wonder what that input cap is doing to the
edges. The trace you posted indicates it *might* be ok if nothing
changed.

Just for grins, get rid of that input cap and do whatever with the
bias to allow you to DC couple the multiplier. That's pretty class
C'ish assuming a 0 - 5V square wave. Don't fry your b-e junction.
Something's wiping out your 5th, so lets get that input RC outta
there.


Hi Mike,
I'm made your suggested changes and re-run the sim.
The new output result across the 1k resistor is now viewable on
abse....

--

The BBC: Licensed at public expense to spread lies.
  #165   Report Post  
Old March 14th 04, 09:58 PM
Paul Burridge
 
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On Sun, 14 Mar 2004 15:55:04 -0500, Active8
wrote:

On Sun, 14 Mar 2004 13:14:40 +0000, Paul Burridge wrote:

On Sat, 13 Mar 2004 20:23:45 -0500, Active8
wrote:

Just a rough guess, since your calling on supreme beings...


The post is still vacant as yet...
:-)

That input cap... I take it the input source is a reasonable
estimate of your square wave... if the time constant of that input
RC net isn't right, it'll be a differentiator, and turn your square
wave into pulses coincident with the rising and falling edges. Your
scope trace suggested otherwise, but IIRC, at that tin=me you were
using the filter at the input to the mult., xo things have changed.


There's been no filtering (other than the selective properties of the
tank circuits) whatsoever employed thus far.

It doesn't look like you're biased in Class C. All the mults I've
seen are Class C biased with the tuned circuit on the collector. And
remember, when you're doing this later for some other purpose, in
Class C, the transistors Vceo - reverse breakdown - must be at least
twice the supply voltage.


Yup, perfectly correct. I must admit that going the class C route with
the tank tuned to the required harmonic was the way I was 'brought up'
as it were. Class C typically generates lots of harmonics as you
obviously know. This multiplier seems to be operating in class A,
which I admit is odd given its high linearity. But I didn't design the
multiplying stage you see here, but the guy who did is an RF expert so
I don't argue. :-)

But you've just given me an idea: maybe I should increase the value of
the 82 ohm base-ground resistor to increase drive signal level and tip
the stage into class C. Worth a try?


Nah. With a *sine* input, you'd bias it so it only conducts for less
than 180 degrees of the fundamental's cycle - keep the trans *out*
of conduction for the most part. Now that I think of it, yer using a
square wave and should have the stinkin' harmonic already, duh. What
was I thinkin'? I still wonder what that input cap is doing to the
edges. The trace you posted indicates it *might* be ok if nothing
changed.

Just for grins, get rid of that input cap and do whatever with the
bias to allow you to DC couple the multiplier. That's pretty class
C'ish assuming a 0 - 5V square wave. Don't fry your b-e junction.
Something's wiping out your 5th, so lets get that input RC outta
there.


Hi Mike,
I'm made your suggested changes and re-run the sim.
The new output result across the 1k resistor is now viewable on
abse....

--

The BBC: Licensed at public expense to spread lies.


  #166   Report Post  
Old March 15th 04, 04:00 AM
James Meyer
 
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On Sun, 14 Mar 2004 12:04:18 -0800, John Larkin
posted this:

On Sun, 14 Mar 2004 19:51:50 GMT, James Meyer
wrote:

The other idea is to make a doubler and a trippler fed from the
fundamental and then feed them into a mixer to get the fifth. If the doubler
and trippler are active (class C) stages, you should get as many db out at the
higher frequency as you put in at the fundamental. The mixer can have gain too.
Three transistors, three tuned circuits, and Bob's yer uncle.

Jim



Why not just bandpass filter the 5th from the square wave? Too simple?


John


Because a square wave has to have a particular on to off ratio to get
enough fifth. Because a square wave needs those nasty logic gates. Because
three transistors are simpler.

Jim


  #167   Report Post  
Old March 15th 04, 04:00 AM
James Meyer
 
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On Sun, 14 Mar 2004 12:04:18 -0800, John Larkin
posted this:

On Sun, 14 Mar 2004 19:51:50 GMT, James Meyer
wrote:

The other idea is to make a doubler and a trippler fed from the
fundamental and then feed them into a mixer to get the fifth. If the doubler
and trippler are active (class C) stages, you should get as many db out at the
higher frequency as you put in at the fundamental. The mixer can have gain too.
Three transistors, three tuned circuits, and Bob's yer uncle.

Jim



Why not just bandpass filter the 5th from the square wave? Too simple?


John


Because a square wave has to have a particular on to off ratio to get
enough fifth. Because a square wave needs those nasty logic gates. Because
three transistors are simpler.

Jim


  #168   Report Post  
Old March 15th 04, 04:05 AM
James Meyer
 
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On Sun, 14 Mar 2004 21:27:19 +0000, Paul Burridge
posted this:

On Sun, 14 Mar 2004 19:51:50 GMT, James Meyer
wrote:

I'm still working on an LTspice version of a varactor multiplier using
the base-emitter junction of a class C amp as the varactor. Basically using an
"idler" tank or tanks to augment the fifth harmonic.

The other idea is to make a doubler and a trippler fed from the
fundamental and then feed them into a mixer to get the fifth. If the doubler
and trippler are active (class C) stages, you should get as many db out at the
higher frequency as you put in at the fundamental. The mixer can have gain too.
Three transistors, three tuned circuits, and Bob's yer uncle.


Jim, please remember the fundamental has to be in the order of
~3.5Mhz.


3.5 MHz... 3.5 GHz 3.5 uHz... makes no difference. The laws of physics
scale nicely for most electronic circuits. Although some ICs are getting
features small enough that the electrons have to line up single file. 8-)

Jim


  #169   Report Post  
Old March 15th 04, 04:05 AM
James Meyer
 
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On Sun, 14 Mar 2004 21:27:19 +0000, Paul Burridge
posted this:

On Sun, 14 Mar 2004 19:51:50 GMT, James Meyer
wrote:

I'm still working on an LTspice version of a varactor multiplier using
the base-emitter junction of a class C amp as the varactor. Basically using an
"idler" tank or tanks to augment the fifth harmonic.

The other idea is to make a doubler and a trippler fed from the
fundamental and then feed them into a mixer to get the fifth. If the doubler
and trippler are active (class C) stages, you should get as many db out at the
higher frequency as you put in at the fundamental. The mixer can have gain too.
Three transistors, three tuned circuits, and Bob's yer uncle.


Jim, please remember the fundamental has to be in the order of
~3.5Mhz.


3.5 MHz... 3.5 GHz 3.5 uHz... makes no difference. The laws of physics
scale nicely for most electronic circuits. Although some ICs are getting
features small enough that the electrons have to line up single file. 8-)

Jim


  #170   Report Post  
Old March 15th 04, 07:43 AM
R.Legg
 
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Paul Burridge wrote in message . ..
On 14 Mar 2004 10:01:00 -0800, (R.Legg) wrote:

C2's small size (3.3pF)is attenuating any 5th harmonic current by 6db
into
Q2's base biasing network, in both posted versions.


Curious. Can you show some figures to back this claim up? (Not that I
don't believe you; just that I'd like to see how you arrived at this
view).


The reactance of the C2 part is almost 3K at the fifth harmonic.

Input impedance of the biasing network is 300 ohms - this is about
half the small signal input impedance of the 3904 @4mA.

Even with bypassed emitter, only 1/3 of C2's AC current will enter the
base of Q2.

If the resonant circuit used lower L and higher C values, C2 could be
increased without as severe an effect as it has here.


Biasing the first stage as classC in the second revision is a pretty
drastic change from the previous class A revision (100mW). Don't you
believe in tiny steps?


I've been trying nothing else *but* "tiny steps" for the last few
days. There's no harm in the ocassional quantum jump. :-)


As previous posters have stated, if the input is squarish then the
harmonics are already there.

There is a +/- 3% window on all the optimum duty cycles (ie 10, 30,
50, 70, 90%), including risetime, for which the 5th harmonic amplitude
is relatively constant, at about 10% of the initial peak amplitude.
Note that the 30/70% period is a median quasi-minima for both 3rd and
4th harmonics, possibly reducing LF filtering problems in the first
stage, as the 1st and 2nd are farther away. 50% being available, you
should stick to it.

I don't know if you're doing any actual physical breadboarding. The
100mW power dissipation suggests not. Pre-apps it's time.

If this is a physical breadboard, then perhaps you might let us know
what you are actually using for your 2uH inductors. You wouldn't want
the relatively hefty classA bias to have any effect on them, so there
should be a lot of air in their flux path - not a couple of turns on a
bead, I hope.

RL
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