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Old February 23rd 06, 02:49 PM posted to sci.electronics.design,comp.arch.fpga,rec.radio.amateur.homebrew
 
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Default Input stage for VHF frequency counter in an FPGA?

Jan Panteltje wrote:

Just a partial reply... I think 7400 series should stop way below 200mHz,
perhaps 50MHz?


It's either a 74AC04 or possibly a 74HC04 (it's upside down so I can't
tell) and it's self oscillating at 294 mhz - (it's stable enough for
the counter to read... a fast scope shows it approximately as a
sinewave.

It seems to be oscillating at about 1/tpd... can't even really pull it
much with finger capacitance - only about 10 mhz.

Interestingly, if I short a the floating input-output pair of an unused
inverter with the scope probe, that runs a bit slower around 260 mhz...
wheras the gate in use has about 20k of resistance in the feedback
path.

I would make a small diff amplifier, did something 40 years ago (yes 40!)
with I think it was BFY90 transistors, then invert with 2 more and drive
the LVDS input.


I may give your transistor circuit a try, either with components or
simulation, thanks.

 
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